eeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeee

commit: 2dbe25f304db92305ea4c0bb50073c809eb1b71e
parent e0745e3ced0626d1ac1c3c905d5a48c4c4c3cbd9
Author: iliana weller <ilianaw@buttslol.net>
Date:   Sat,  8 Dec 2018 11:09:26 -0800

Eeeee EE #195 eeee scanlime/eeeeeeeeeeeeeeeeeeeeeeee

Verilog
Diffstat:
A
e.v
4
++++

1 file changed, 4 insertions(+), 0 deletions(-)
diff --git a/e.v b/e.v
@@ -0,0 +1,3 @@
+module e;
+	always #1 $write("e");
+endmodule+
\ No newline at end of file