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qmk_firmware

custom branch of QMK firmware git clone https://anongit.hacktivis.me/git/qmk_firmware.git

audio_dac_basic.c (9397B)


  1. /* Copyright 2016-2020 Jack Humbert
  2. * Copyright 2020 JohSchneider
  3. *
  4. * This program is free software: you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation, either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #include "audio.h"
  18. #include "gpio.h"
  19. // Need to disable GCC's "tautological-compare" warning for this file, as it causes issues when running `KEEP_INTERMEDIATES=yes`. Corresponding pop at the end of the file.
  20. #pragma GCC diagnostic push
  21. #pragma GCC diagnostic ignored "-Wtautological-compare"
  22. /*
  23. Audio Driver: DAC
  24. which utilizes both channels of the DAC unit many STM32 are equipped with to output a modulated square-wave, from precomputed samples stored in a buffer, which is passed to the hardware through DMA
  25. this driver can either be used to drive to separate speakers, wired to A4+Gnd and A5+Gnd, which allows two tones to be played simultaneously
  26. OR
  27. one speaker wired to A4+A5 with the AUDIO_PIN_ALT_AS_NEGATIVE define set - see docs/feature_audio
  28. */
  29. #if !defined(AUDIO_PIN)
  30. # pragma message "Audio feature enabled, but no suitable pin selected as AUDIO_PIN - see docs/feature_audio under 'ARM (DAC basic)' for available options."
  31. // TODO: make this an 'error' instead; go through a breaking change, and add AUDIO_PIN A5 to all keyboards currently using AUDIO on STM32 based boards? - for now: set the define here
  32. # define AUDIO_PIN A5
  33. #endif
  34. // check configuration for ONE speaker, connected to both DAC pins
  35. #if defined(AUDIO_PIN_ALT_AS_NEGATIVE) && !defined(AUDIO_PIN_ALT)
  36. # error "Audio feature: AUDIO_PIN_ALT_AS_NEGATIVE set, but no pin configured as AUDIO_PIN_ALT"
  37. #endif
  38. #ifndef AUDIO_PIN_ALT
  39. // no ALT pin defined is valid, but the c-ifs below need some value set
  40. # define AUDIO_PIN_ALT -1
  41. #endif
  42. #if !defined(AUDIO_STATE_TIMER)
  43. # define AUDIO_STATE_TIMER GPTD8
  44. #endif
  45. // square-wave
  46. static const dacsample_t dac_buffer_1[AUDIO_DAC_BUFFER_SIZE] = {
  47. // First half is max, second half is 0
  48. [0 ... AUDIO_DAC_BUFFER_SIZE / 2 - 1] = AUDIO_DAC_SAMPLE_MAX,
  49. [AUDIO_DAC_BUFFER_SIZE / 2 ... AUDIO_DAC_BUFFER_SIZE - 1] = 0,
  50. };
  51. // square-wave
  52. static const dacsample_t dac_buffer_2[AUDIO_DAC_BUFFER_SIZE] = {
  53. // opposite of dac_buffer above
  54. [0 ... AUDIO_DAC_BUFFER_SIZE / 2 - 1] = 0,
  55. [AUDIO_DAC_BUFFER_SIZE / 2 ... AUDIO_DAC_BUFFER_SIZE - 1] = AUDIO_DAC_SAMPLE_MAX,
  56. };
  57. GPTConfig gpt6cfg1 = {.frequency = AUDIO_DAC_SAMPLE_RATE,
  58. .callback = NULL,
  59. .cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
  60. .dier = 0U};
  61. GPTConfig gpt7cfg1 = {.frequency = AUDIO_DAC_SAMPLE_RATE,
  62. .callback = NULL,
  63. .cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
  64. .dier = 0U};
  65. static void gpt_audio_state_cb(GPTDriver *gptp);
  66. GPTConfig gptStateUpdateCfg = {.frequency = 10,
  67. .callback = gpt_audio_state_cb,
  68. .cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
  69. .dier = 0U};
  70. static const DACConfig dac_conf_ch1 = {.init = AUDIO_DAC_OFF_VALUE, .datamode = DAC_DHRM_12BIT_RIGHT};
  71. static const DACConfig dac_conf_ch2 = {.init = AUDIO_DAC_OFF_VALUE, .datamode = DAC_DHRM_12BIT_RIGHT};
  72. /**
  73. * @note The DAC_TRG(0) here selects the Timer 6 TRGO event, which is triggered
  74. * on the rising edge after 3 APB1 clock cycles, causing our gpt6cfg1.frequency
  75. * to be a third of what we expect.
  76. *
  77. * Here are all the values for DAC_TRG (TSEL in the ref manual)
  78. * TIM15_TRGO 0b011
  79. * TIM2_TRGO 0b100
  80. * TIM3_TRGO 0b001
  81. * TIM6_TRGO 0b000
  82. * TIM7_TRGO 0b010
  83. * EXTI9 0b110
  84. * SWTRIG 0b111
  85. */
  86. static const DACConversionGroup dac_conv_grp_ch1 = {.num_channels = 1U, .trigger = DAC_TRG(0b000)};
  87. static const DACConversionGroup dac_conv_grp_ch2 = {.num_channels = 1U, .trigger = DAC_TRG(0b010)};
  88. void channel_1_start(void) {
  89. gptStart(&GPTD6, &gpt6cfg1);
  90. gptStartContinuous(&GPTD6, 2U);
  91. palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
  92. }
  93. void channel_1_stop(void) {
  94. gptStopTimer(&GPTD6);
  95. palSetPadMode(GPIOA, 4, PAL_MODE_OUTPUT_PUSHPULL);
  96. palSetPad(GPIOA, 4);
  97. }
  98. static float channel_1_frequency = 0.0f;
  99. void channel_1_set_frequency(float freq) {
  100. channel_1_frequency = freq;
  101. channel_1_stop();
  102. if (freq <= 0.0) // a pause/rest has freq=0
  103. return;
  104. gpt6cfg1.frequency = 2 * freq * AUDIO_DAC_BUFFER_SIZE;
  105. channel_1_start();
  106. }
  107. float channel_1_get_frequency(void) {
  108. return channel_1_frequency;
  109. }
  110. void channel_2_start(void) {
  111. gptStart(&GPTD7, &gpt7cfg1);
  112. gptStartContinuous(&GPTD7, 2U);
  113. palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
  114. }
  115. void channel_2_stop(void) {
  116. gptStopTimer(&GPTD7);
  117. palSetPadMode(GPIOA, 5, PAL_MODE_OUTPUT_PUSHPULL);
  118. palSetPad(GPIOA, 5);
  119. }
  120. static float channel_2_frequency = 0.0f;
  121. void channel_2_set_frequency(float freq) {
  122. channel_2_frequency = freq;
  123. channel_2_stop();
  124. if (freq <= 0.0) // a pause/rest has freq=0
  125. return;
  126. gpt7cfg1.frequency = 2 * freq * AUDIO_DAC_BUFFER_SIZE;
  127. channel_2_start();
  128. }
  129. float channel_2_get_frequency(void) {
  130. return channel_2_frequency;
  131. }
  132. static void gpt_audio_state_cb(GPTDriver *gptp) {
  133. if (audio_update_state()) {
  134. #if defined(AUDIO_PIN_ALT_AS_NEGATIVE)
  135. // one piezo/speaker connected to both audio pins, the generated square-waves are inverted
  136. channel_1_set_frequency(audio_get_processed_frequency(0));
  137. channel_2_set_frequency(audio_get_processed_frequency(0));
  138. #else // two separate audio outputs/speakers
  139. // primary speaker on A4, optional secondary on A5
  140. if (AUDIO_PIN == A4) {
  141. channel_1_set_frequency(audio_get_processed_frequency(0));
  142. if (AUDIO_PIN_ALT == A5) {
  143. if (audio_get_number_of_active_tones() > 1) {
  144. channel_2_set_frequency(audio_get_processed_frequency(1));
  145. } else {
  146. channel_2_stop();
  147. }
  148. }
  149. }
  150. // primary speaker on A5, optional secondary on A4
  151. if (AUDIO_PIN == A5) {
  152. channel_2_set_frequency(audio_get_processed_frequency(0));
  153. if (AUDIO_PIN_ALT == A4) {
  154. if (audio_get_number_of_active_tones() > 1) {
  155. channel_1_set_frequency(audio_get_processed_frequency(1));
  156. } else {
  157. channel_1_stop();
  158. }
  159. }
  160. }
  161. #endif
  162. }
  163. }
  164. void audio_driver_initialize_impl(void) {
  165. if ((AUDIO_PIN == A4) || (AUDIO_PIN_ALT == A4)) {
  166. palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
  167. dacStart(&DACD1, &dac_conf_ch1);
  168. // initial setup of the dac-triggering timer is still required, even
  169. // though it gets reconfigured and restarted later on
  170. gptStart(&GPTD6, &gpt6cfg1);
  171. }
  172. if ((AUDIO_PIN == A5) || (AUDIO_PIN_ALT == A5)) {
  173. palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
  174. dacStart(&DACD2, &dac_conf_ch2);
  175. gptStart(&GPTD7, &gpt7cfg1);
  176. }
  177. /* enable the output buffer, to directly drive external loads with no additional circuitry
  178. *
  179. * see: AN4566 Application note: Extending the DAC performance of STM32 microcontrollers
  180. * Note: Buffer-Off bit -> has to be set 0 to enable the output buffer
  181. * Note: enabling the output buffer imparts an additional dc-offset of a couple mV
  182. *
  183. * this is done here, reaching directly into the stm32 registers since chibios has not implemented BOFF handling yet
  184. * (see: chibios/os/hal/ports/STM32/todo.txt '- BOFF handling in DACv1.'
  185. */
  186. DACD1.params->dac->CR &= ~DAC_CR_BOFF1;
  187. DACD2.params->dac->CR &= ~DAC_CR_BOFF2;
  188. // start state-updater
  189. gptStart(&AUDIO_STATE_TIMER, &gptStateUpdateCfg);
  190. }
  191. void audio_driver_stop_impl(void) {
  192. if ((AUDIO_PIN == A4) || (AUDIO_PIN_ALT == A4)) {
  193. gptStopTimer(&GPTD6);
  194. // stop the ongoing conversion and put the output in a known state
  195. dacStopConversion(&DACD1);
  196. dacPutChannelX(&DACD1, 0, AUDIO_DAC_OFF_VALUE);
  197. }
  198. if ((AUDIO_PIN == A5) || (AUDIO_PIN_ALT == A5)) {
  199. gptStopTimer(&GPTD7);
  200. dacStopConversion(&DACD2);
  201. dacPutChannelX(&DACD2, 0, AUDIO_DAC_OFF_VALUE);
  202. }
  203. gptStopTimer(&AUDIO_STATE_TIMER);
  204. }
  205. void audio_driver_start_impl(void) {
  206. if ((AUDIO_PIN == A4) || (AUDIO_PIN_ALT == A4)) {
  207. dacStartConversion(&DACD1, &dac_conv_grp_ch1, (dacsample_t *)dac_buffer_1, AUDIO_DAC_BUFFER_SIZE);
  208. }
  209. if ((AUDIO_PIN == A5) || (AUDIO_PIN_ALT == A5)) {
  210. dacStartConversion(&DACD2, &dac_conv_grp_ch2, (dacsample_t *)dac_buffer_2, AUDIO_DAC_BUFFER_SIZE);
  211. }
  212. gptStartContinuous(&AUDIO_STATE_TIMER, 2U);
  213. }
  214. #pragma GCC diagnostic pop