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qmk_firmware

custom branch of QMK firmware git clone https://anongit.hacktivis.me/git/qmk_firmware.git

mcuconf.h (8188B)

    

  1. /*
  2.     ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
  3.     ChibiOS - Copyright (C) 2023..2025 HorrorTroll
  4.     ChibiOS - Copyright (C) 2023..2025 Zhaqian
  6.     Licensed under the Apache License, Version 2.0 (the "License");
  7.     you may not use this file except in compliance with the License.
  8.     You may obtain a copy of the License at
  10.         http://www.apache.org/licenses/LICENSE-2.0
  12.     Unless required by applicable law or agreed to in writing, software
  13.     distributed under the License is distributed on an "AS IS" BASIS,
  14.     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15.     See the License for the specific language governing permissions and
  16.     limitations under the License.
  17. */
  19. #ifndef MCUCONF_H
  20. #define MCUCONF_H
  22. /*
  23.  * AT32F415 drivers configuration.
  24.  * The following settings override the default settings present in
  25.  * the various device driver implementation headers.
  26.  * Note that the settings for each driver only have effect if the whole
  27.  * driver is enabled in halconf.h.
  28.  *
  29.  * IRQ priorities:
  30.  * 15...0       Lowest...Highest.
  31.  *
  32.  * DMA priorities:
  33.  * 0...3        Lowest...Highest.
  34.  */
  36. #define AT32F415_MCUCONF
  38. /*
  39.  * General settings.
  40.  */
  41. #define AT32_NO_INIT                        FALSE
  43. /*
  44.  * HAL driver system settings.
  45.  */
  46. #define AT32_HICK_ENABLED                   TRUE
  47. #define AT32_LICK_ENABLED                   FALSE
  48. #define AT32_HEXT_ENABLED                   TRUE
  49. #define AT32_LEXT_ENABLED                   FALSE
  50. #define AT32_SCLKSEL                        AT32_SCLKSEL_PLL
  51. #define AT32_PLLRCS                         AT32_PLLRCS_HEXT
  52. #define AT32_PLLHEXTDIV                     AT32_PLLHEXTDIV_DIV1
  53. #define AT32_PLLCFGEN                       AT32_PLLCFGEN_SOLID
  54. #define AT32_PLLMULT_VALUE                  18
  55. #define AT32_PLL_FR_VALUE                   4
  56. #define AT32_PLL_MS_VALUE                   1
  57. #define AT32_PLL_NS_VALUE                   72
  58. #define AT32_AHBDIV                         AT32_AHBDIV_DIV1
  59. #define AT32_APB1DIV                        AT32_APB1DIV_DIV2
  60. #define AT32_APB2DIV                        AT32_APB2DIV_DIV2
  61. #define AT32_ADCDIV                         AT32_ADCDIV_DIV4
  62. #define AT32_USB_CLOCK_REQUIRED             TRUE
  63. #define AT32_USBDIV                         AT32_USBDIV_DIV3
  64. #define AT32_CLKOUT_SEL                     AT32_CLKOUT_SEL_NOCLOCK
  65. #define AT32_CLKOUTDIV                      AT32_CLKOUTDIV_DIV1
  66. #define AT32_ERTCSEL                        AT32_ERTCSEL_NOCLOCK
  67. #define AT32_PVM_ENABLE                     FALSE
  68. #define AT32_PVMSEL                         AT32_PVMSEL_LEV1
  70. /*
  71.  * IRQ system settings.
  72.  */
  73. #define AT32_IRQ_EXINT0_PRIORITY            6
  74. #define AT32_IRQ_EXINT1_PRIORITY            6
  75. #define AT32_IRQ_EXINT2_PRIORITY            6
  76. #define AT32_IRQ_EXINT3_PRIORITY            6
  77. #define AT32_IRQ_EXINT4_PRIORITY            6
  78. #define AT32_IRQ_EXINT5_9_PRIORITY          6
  79. #define AT32_IRQ_EXINT10_15_PRIORITY        6
  80. #define AT32_IRQ_EXINT16_PRIORITY           6
  81. #define AT32_IRQ_EXINT17_PRIORITY           15
  82. #define AT32_IRQ_EXINT18_PRIORITY           6
  83. #define AT32_IRQ_EXINT19_PRIORITY           6
  84. #define AT32_IRQ_EXINT20_PRIORITY           6
  85. #define AT32_IRQ_EXINT21_PRIORITY           15
  86. #define AT32_IRQ_EXINT22_PRIORITY           15
  88. #define AT32_IRQ_TMR1_BRK_TMR9_PRIORITY     7
  89. #define AT32_IRQ_TMR1_OVF_TMR10_PRIORITY    7
  90. #define AT32_IRQ_TMR1_HALL_TMR11_PRIORITY   7
  91. #define AT32_IRQ_TMR1_CH_PRIORITY           7
  92. #define AT32_IRQ_TMR2_PRIORITY              7
  93. #define AT32_IRQ_TMR3_PRIORITY              7
  94. #define AT32_IRQ_TMR4_PRIORITY              7
  95. #define AT32_IRQ_TMR5_PRIORITY              7
  97. #define AT32_IRQ_USART1_PRIORITY            12
  98. #define AT32_IRQ_USART2_PRIORITY            12
  99. #define AT32_IRQ_USART3_PRIORITY            12
  100. #define AT32_IRQ_UART4_PRIORITY             12
  101. #define AT32_IRQ_UART5_PRIORITY             12
  103. /*
  104.  * ADC driver system settings.
  105.  */
  106. #define AT32_ADC_USE_ADC1                   FALSE
  107. #define AT32_ADC_ADC1_DMA_PRIORITY          2
  108. #define AT32_ADC_ADC1_IRQ_PRIORITY          6
  110. /*
  111.  * CAN driver system settings.
  112.  */
  113. #define AT32_CAN_USE_CAN1                   FALSE
  114. #define AT32_CAN_CAN1_IRQ_PRIORITY          11
  116. /*
  117.  * DMA driver system settings.
  118.  */
  119. #define AT32_DMA_USE_DMAMUX                 TRUE
  121. /*
  122.  * GPT driver system settings.
  123.  */
  124. #define AT32_GPT_USE_TMR1                   FALSE
  125. #define AT32_GPT_USE_TMR2                   FALSE
  126. #define AT32_GPT_USE_TMR3                   FALSE
  127. #define AT32_GPT_USE_TMR4                   FALSE
  128. #define AT32_GPT_USE_TMR5                   FALSE
  129. #define AT32_GPT_USE_TMR9                   FALSE
  130. #define AT32_GPT_USE_TMR10                  FALSE
  131. #define AT32_GPT_USE_TMR11                  FALSE
  133. /*
  134.  * I2C driver system settings.
  135.  */
  136. #define AT32_I2C_USE_I2C1                   FALSE
  137. #define AT32_I2C_USE_I2C2                   FALSE
  138. #define AT32_I2C_BUSY_TIMEOUT               50
  139. #define AT32_I2C_I2C1_DMA_PRIORITY          3
  140. #define AT32_I2C_I2C2_DMA_PRIORITY          3
  141. #define AT32_I2C_I2C1_IRQ_PRIORITY          5
  142. #define AT32_I2C_I2C2_IRQ_PRIORITY          5
  143. #define AT32_I2C_DMA_ERROR_HOOK(i2cp)       osalSysHalt("DMA failure")
  145. /*
  146.  * ICU driver system settings.
  147.  */
  148. #define AT32_ICU_USE_TMR1                   FALSE
  149. #define AT32_ICU_USE_TMR2                   FALSE
  150. #define AT32_ICU_USE_TMR3                   FALSE
  151. #define AT32_ICU_USE_TMR4                   FALSE
  152. #define AT32_ICU_USE_TMR5                   FALSE
  153. #define AT32_ICU_USE_TMR9                   FALSE
  155. /*
  156.  * PWM driver system settings.
  157.  */
  158. #define AT32_PWM_USE_TMR1                   FALSE
  159. #define AT32_PWM_USE_TMR2                   FALSE
  160. #define AT32_PWM_USE_TMR3                   FALSE
  161. #define AT32_PWM_USE_TMR4                   FALSE
  162. #define AT32_PWM_USE_TMR5                   FALSE
  163. #define AT32_PWM_USE_TMR9                   FALSE
  164. #define AT32_PWM_USE_TMR10                  FALSE
  165. #define AT32_PWM_USE_TMR11                  FALSE
  167. /*
  168.  * RTC driver system settings.
  169.  */
  170. #define AT32_ERTC_DIVA_VALUE                32
  171. #define AT32_ERTC_DIVB_VALUE                1024
  172. #define AT32_ERTC_CTRL_INIT                 0
  173. #define AT32_ERTC_TAMP_INIT                 0
  175. /*
  176.  * SDC driver system settings.
  177.  */
  178. #define AT32_SDC_SDIO_DMA_PRIORITY          3
  179. #define AT32_SDC_SDIO_IRQ_PRIORITY          9
  180. #define AT32_SDC_WRITE_TIMEOUT_MS           1000
  181. #define AT32_SDC_READ_TIMEOUT_MS            1000
  182. #define AT32_SDC_CLOCK_ACTIVATION_DELAY     10
  183. #define AT32_SDC_SDIO_UNALIGNED_SUPPORT     TRUE
  185. /*
  186.  * SERIAL driver system settings.
  187.  */
  188. #define AT32_SERIAL_USE_USART1              FALSE
  189. #define AT32_SERIAL_USE_USART2              FALSE
  190. #define AT32_SERIAL_USE_USART3              FALSE
  191. #define AT32_SERIAL_USE_UART4               FALSE
  192. #define AT32_SERIAL_USE_UART5               FALSE
  194. /*
  195.  * SPI driver system settings.
  196.  */
  197. #define AT32_SPI_USE_SPI1                   FALSE
  198. #define AT32_SPI_USE_SPI2                   FALSE
  199. #define AT32_SPI_SPI1_DMA_PRIORITY          1
  200. #define AT32_SPI_SPI2_DMA_PRIORITY          1
  201. #define AT32_SPI_SPI1_IRQ_PRIORITY          10
  202. #define AT32_SPI_SPI2_IRQ_PRIORITY          10
  203. #define AT32_SPI_DMA_ERROR_HOOK(spip)       osalSysHalt("DMA failure")
  205. /*
  206.  * ST driver system settings.
  207.  */
  208. #define AT32_ST_IRQ_PRIORITY                8
  209. #define AT32_ST_USE_TIMER                   2
  211. /*
  212.  * UART driver system settings.
  213.  */
  214. #define AT32_UART_USE_USART1                FALSE
  215. #define AT32_UART_USE_USART2                FALSE
  216. #define AT32_UART_USE_USART3                FALSE
  217. #define AT32_UART_USE_UART4                 FALSE
  218. #define AT32_UART_USE_UART5                 FALSE
  219. #define AT32_UART_USART1_DMA_PRIORITY       0
  220. #define AT32_UART_USART2_DMA_PRIORITY       0
  221. #define AT32_UART_USART3_DMA_PRIORITY       0
  222. #define AT32_UART_UART4_DMA_PRIORITY        0
  223. #define AT32_UART_UART5_DMA_PRIORITY        0
  224. #define AT32_UART_DMA_ERROR_HOOK(uartp)     osalSysHalt("DMA failure")
  226. /*
  227.  * USB driver system settings.
  228.  */
  229. #define AT32_USB_USE_OTG1                   TRUE
  230. #define AT32_USB_OTG1_IRQ_PRIORITY          14
  231. #define AT32_USB_OTG1_RX_FIFO_SIZE          512
  233. /*
  234.  * WDG driver system settings.
  235.  */
  236. #define AT32_WDG_USE_WDT                    FALSE
  238. #endif /* MCUCONF_H */