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qmk_firmware

custom branch of QMK firmware git clone https://anongit.hacktivis.me/git/qmk_firmware.git

board.h (7227B)


  1. /*
  2. ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
  3. ChibiOS - Copyright (C) 2023..2025 HorrorTroll
  4. ChibiOS - Copyright (C) 2023..2025 Zhaqian
  5. Licensed under the Apache License, Version 2.0 (the "License");
  6. you may not use this file except in compliance with the License.
  7. You may obtain a copy of the License at
  8. http://www.apache.org/licenses/LICENSE-2.0
  9. Unless required by applicable law or agreed to in writing, software
  10. distributed under the License is distributed on an "AS IS" BASIS,
  11. WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. See the License for the specific language governing permissions and
  13. limitations under the License.
  14. */
  15. #ifndef _BOARD_H_
  16. #define _BOARD_H_
  17. /*===========================================================================*/
  18. /* Driver constants. */
  19. /*===========================================================================*/
  20. /*
  21. * Setup for a Generic AT32F415 board.
  22. */
  23. /*
  24. * Board identifier.
  25. */
  26. #define BOARD_GENERIC_AT32_F415XX
  27. #define BOARD_NAME "GENERIC AT32F415 board"
  28. /*
  29. * Board oscillators-related settings.
  30. */
  31. #if !defined(AT32_LEXTCLK)
  32. #define AT32_LEXTCLK 32768
  33. #endif
  34. #if !defined(AT32_HEXTCLK)
  35. #define AT32_HEXTCLK 8000000
  36. #endif
  37. /*
  38. * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
  39. */
  40. #define AT32F415KB
  41. /*
  42. * GPIO settings, allow unused GPIO for smaller chip packages.
  43. */
  44. #if defined(AT32F415KB) || defined(AT32F415KC)
  45. #define AT32_HAS_GPIOC TRUE
  46. #define AT32_HAS_GPIOF TRUE
  47. #endif
  48. /*
  49. * IO pins assignments.
  50. */
  51. #define GPIOA_PIN0 0U
  52. #define GPIOA_PIN1 1U
  53. #define GPIOA_PIN2 2U
  54. #define GPIOA_PIN3 3U
  55. #define GPIOA_PIN4 4U
  56. #define GPIOA_PIN5 5U
  57. #define GPIOA_PIN6 6U
  58. #define GPIOA_PIN7 7U
  59. #define GPIOA_PIN8 8U
  60. #define GPIOA_PIN9 9U
  61. #define GPIOA_PIN10 10U
  62. #define GPIOA_PIN11 11U
  63. #define GPIOA_PIN12 12U
  64. #define GPIOA_SWDIO 13U
  65. #define GPIOA_SWCLK 14U
  66. #define GPIOA_PIN15 15U
  67. #define GPIOB_PIN0 0U
  68. #define GPIOB_PIN1 1U
  69. #define GPIOB_PIN2 2U
  70. #define GPIOB_PIN3 3U
  71. #define GPIOB_PIN4 4U
  72. #define GPIOB_PIN5 5U
  73. #define GPIOB_PIN6 6U
  74. #define GPIOB_PIN7 7U
  75. #define GPIOB_PIN8 8U
  76. #define GPIOB_PIN9 9U
  77. #define GPIOB_PIN10 10U
  78. #define GPIOB_PIN11 11U
  79. #define GPIOB_PIN12 12U
  80. #define GPIOB_PIN13 13U
  81. #define GPIOB_PIN14 14U
  82. #define GPIOB_PIN15 15U
  83. #define GPIOC_PIN0 0U
  84. #define GPIOC_PIN1 1U
  85. #define GPIOC_PIN2 2U
  86. #define GPIOC_PIN3 3U
  87. #define GPIOC_PIN4 4U
  88. #define GPIOC_PIN5 5U
  89. #define GPIOC_PIN6 6U
  90. #define GPIOC_PIN7 7U
  91. #define GPIOC_PIN8 8U
  92. #define GPIOC_PIN9 9U
  93. #define GPIOC_PIN10 10U
  94. #define GPIOC_PIN11 11U
  95. #define GPIOC_PIN12 12U
  96. #define GPIOC_PIN13 13U
  97. #define GPIOC_PIN14 14U
  98. #define GPIOC_PIN15 15U
  99. #define GPIOD_HEXT_IN 0U
  100. #define GPIOD_HEXT_OUT 1U
  101. #define GPIOD_PIN2 2U
  102. #define GPIOF_PIN4 4U
  103. #define GPIOF_PIN5 5U
  104. #define GPIOF_PIN6 6U
  105. #define GPIOF_PIN7 7U
  106. /*===========================================================================*/
  107. /* Driver pre-compile time settings. */
  108. /*===========================================================================*/
  109. /*===========================================================================*/
  110. /* Derived constants and error checks. */
  111. /*===========================================================================*/
  112. /*===========================================================================*/
  113. /* Driver data structures and types. */
  114. /*===========================================================================*/
  115. /*===========================================================================*/
  116. /* Driver macros. */
  117. /*===========================================================================*/
  118. /*
  119. * I/O ports initial setup, this configuration is established soon after reset
  120. * in the initialization code.
  121. *
  122. * The digits have the following meaning:
  123. * 0 - Analog input.
  124. * 1 - Push Pull output 10MHz.
  125. * 2 - Push Pull output 2MHz.
  126. * 3 - Push Pull output 50MHz.
  127. * 4 - Digital input.
  128. * 5 - Open Drain output 10MHz.
  129. * 6 - Open Drain output 2MHz.
  130. * 7 - Open Drain output 50MHz.
  131. * 8 - Digital input with Pull-Up or Pull-Down resistor depending on ODT.
  132. * 9 - Multiplexing Push Pull output 10MHz.
  133. * A - Multiplexing Push Pull output 2MHz.
  134. * B - Multiplexing Push Pull output 50MHz.
  135. * C - Reserved.
  136. * D - Multiplexing Open Drain output 10MHz.
  137. * E - Multiplexing Open Drain output 2MHz.
  138. * F - Multiplexing Open Drain output 50MHz.
  139. * Please refer to the AT32 Reference Manual for details.
  140. */
  141. /*
  142. * Port A setup.
  143. */
  144. #define VAL_GPIOACFGLR 0x88888888 /* PA7...PA0 */
  145. #define VAL_GPIOACFGHR 0x88888888 /* PA15...PA8 */
  146. #define VAL_GPIOAODT 0xFFFFFFFF
  147. /*
  148. * Port B setup.
  149. */
  150. #define VAL_GPIOBCFGLR 0x88888888 /* PB7...PB0 */
  151. #define VAL_GPIOBCFGHR 0x88888888 /* PB15...PB8 */
  152. #define VAL_GPIOBODT 0xFFFFFFFF
  153. /*
  154. * Port C setup.
  155. */
  156. #define VAL_GPIOCCFGLR 0x88888888 /* PC7...PC0 */
  157. #define VAL_GPIOCCFGHR 0x88888888 /* PC15...PC8 */
  158. #define VAL_GPIOCODT 0xFFFFFFFF
  159. /*
  160. * Port D setup.
  161. * Everything input with pull-up except:
  162. * PD0 - Normal input (GPIOD_HEXT_IN).
  163. * PD1 - Normal input (GPIOD_HEXT_OUT).
  164. */
  165. #define VAL_GPIODCFGLR 0x88888844 /* PD7...PD0 */
  166. #define VAL_GPIODCFGHR 0x88888888 /* PD15...PD8 */
  167. #define VAL_GPIODODT 0xFFFFFFFF
  168. /*
  169. * Port F setup.
  170. */
  171. #define VAL_GPIOFCFGLR 0x88888888 /* PF7...PF0 */
  172. #define VAL_GPIOFCFGHR 0x88888888 /* PF15...PF8 */
  173. #define VAL_GPIOFODT 0xFFFFFFFF
  174. /*===========================================================================*/
  175. /* External declarations. */
  176. /*===========================================================================*/
  177. #if !defined(_FROM_ASM_)
  178. #ifdef __cplusplus
  179. extern "C" {
  180. #endif
  181. void boardInit(void);
  182. #ifdef __cplusplus
  183. }
  184. #endif
  185. #endif /* _FROM_ASM_ */
  186. #endif /* _BOARD_H_ */