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qmk_firmware

custom branch of QMK firmware git clone https://anongit.hacktivis.me/git/qmk_firmware.git

_wait.h (3305B)


  1. /* Copyright 2021 QMK
  2. *
  3. * This program is free software: you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License as published by
  5. * the Free Software Foundation, either version 3 of the License, or
  6. * (at your option) any later version.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #pragma once
  17. // Need to disable GCC's "maybe-uninitialized" warning for this file, as it causes issues when running `KEEP_INTERMEDIATES=yes`.
  18. #pragma GCC diagnostic push
  19. #pragma GCC diagnostic ignored "-Wmaybe-uninitialized"
  20. #include <util/delay.h>
  21. #pragma GCC diagnostic pop
  22. extern void __builtin_avr_delay_cycles(uint32_t);
  23. // http://ww1.microchip.com/downloads/en/devicedoc/atmel-0856-avr-instruction-set-manual.pdf
  24. // page 22: Table 4-2. Arithmetic and Logic Instructions
  25. /*
  26. for (uint16_t i = times; i > 0; i--) {
  27. __builtin_avr_delay_cycles(1);
  28. }
  29. .L3: sbiw r24,0 // loop step 1
  30. brne .L4 // loop step 2
  31. ret
  32. .L4: nop // __builtin_avr_delay_cycles(1);
  33. sbiw r24,1 // loop step 3
  34. rjmp .L3 // loop step 4
  35. */
  36. #define AVR_sbiw_clocks 2
  37. #define AVR_rjmp_clocks 2
  38. #define AVR_brne_clocks 2
  39. #define AVR_WAIT_LOOP_OVERHEAD (AVR_sbiw_clocks + AVR_brne_clocks + AVR_sbiw_clocks + AVR_rjmp_clocks)
  40. #define wait_ms(ms) \
  41. do { \
  42. if (__builtin_constant_p(ms)) { \
  43. _delay_ms(ms); \
  44. } else { \
  45. for (uint16_t i = ms; i > 0; i--) { \
  46. _delay_ms(1); \
  47. } \
  48. } \
  49. } while (0)
  50. #define wait_us(us) \
  51. do { \
  52. if (__builtin_constant_p(us)) { \
  53. _delay_us(us); \
  54. } else { \
  55. for (uint16_t i = us; i > 0; i--) { \
  56. __builtin_avr_delay_cycles((F_CPU / 1000000) - AVR_WAIT_LOOP_OVERHEAD); \
  57. } \
  58. } \
  59. } while (0)
  60. #define wait_cpuclock(n) __builtin_avr_delay_cycles(n)
  61. #define CPU_CLOCK F_CPU
  62. /* The AVR series GPIOs have a one clock read delay for changes in the digital input signal.
  63. * But here's more margin to make it two clocks. */
  64. #ifndef GPIO_INPUT_PIN_DELAY
  65. # define GPIO_INPUT_PIN_DELAY 2
  66. #endif
  67. #define waitInputPinDelay() wait_cpuclock(GPIO_INPUT_PIN_DELAY)