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qmk_firmware

custom branch of QMK firmware git clone https://anongit.hacktivis.me/git/qmk_firmware.git

adns5050.c (7291B)


  1. /* Copyright 2021 Colin Lam (Ploopy Corporation)
  2. * Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com>
  3. * Copyright 2019 Sunjun Kim
  4. * Copyright 2019 Hiroyuki Okada
  5. *
  6. * This program is free software: you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation, either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "adns5050.h"
  20. #include "wait.h"
  21. #include "debug.h"
  22. #include "gpio.h"
  23. #include "pointing_device_internal.h"
  24. // Registers
  25. // clang-format off
  26. #define REG_PRODUCT_ID 0x00
  27. #define REG_REVISION_ID 0x01
  28. #define REG_MOTION 0x02
  29. #define REG_DELTA_X 0x03
  30. #define REG_DELTA_Y 0x04
  31. #define REG_SQUAL 0x05
  32. #define REG_SHUTTER_UPPER 0x06
  33. #define REG_SHUTTER_LOWER 0x07
  34. #define REG_MAXIMUM_PIXEL 0x08
  35. #define REG_PIXEL_SUM 0x09
  36. #define REG_MINIMUM_PIXEL 0x0a
  37. #define REG_PIXEL_GRAB 0x0b
  38. #define REG_MOUSE_CONTROL 0x0d
  39. #define REG_MOUSE_CONTROL2 0x19
  40. #define REG_LED_DC_MODE 0x22
  41. #define REG_CHIP_RESET 0x3a
  42. #define REG_PRODUCT_ID2 0x3e
  43. #define REG_INV_REV_ID 0x3f
  44. #define REG_MOTION_BURST 0x63
  45. // clang-format on
  46. const pointing_device_driver_t adns5050_pointing_device_driver = {
  47. .init = adns5050_init,
  48. .get_report = adns5050_get_report,
  49. .set_cpi = adns5050_set_cpi,
  50. .get_cpi = adns5050_get_cpi,
  51. };
  52. static bool powered_down = false;
  53. void adns5050_init(void) {
  54. // Initialize the ADNS serial pins.
  55. gpio_set_pin_output(ADNS5050_SCLK_PIN);
  56. gpio_set_pin_output(ADNS5050_SDIO_PIN);
  57. gpio_set_pin_output(ADNS5050_CS_PIN);
  58. // reboot the adns.
  59. // if the adns hasn't initialized yet, this is harmless.
  60. adns5050_write_reg(REG_CHIP_RESET, 0x5a);
  61. // wait maximum time before adns is ready.
  62. // this ensures that the adns is actuall ready after reset.
  63. wait_ms(55);
  64. powered_down = false;
  65. // read a burst from the adns and then discard it.
  66. // gets the adns ready for write commands
  67. // (for example, setting the dpi).
  68. adns5050_read_burst();
  69. }
  70. // Perform a synchronization with the ADNS.
  71. // Just as with the serial protocol, this is used by the slave to send a
  72. // synchronization signal to the master.
  73. void adns5050_sync(void) {
  74. gpio_write_pin_low(ADNS5050_CS_PIN);
  75. wait_us(1);
  76. gpio_write_pin_high(ADNS5050_CS_PIN);
  77. }
  78. void adns5050_cs_select(void) {
  79. gpio_write_pin_low(ADNS5050_CS_PIN);
  80. }
  81. void adns5050_cs_deselect(void) {
  82. gpio_write_pin_high(ADNS5050_CS_PIN);
  83. }
  84. uint8_t adns5050_serial_read(void) {
  85. gpio_set_pin_input(ADNS5050_SDIO_PIN);
  86. uint8_t byte = 0;
  87. for (uint8_t i = 0; i < 8; ++i) {
  88. gpio_write_pin_low(ADNS5050_SCLK_PIN);
  89. wait_us(1);
  90. byte = (byte << 1) | gpio_read_pin(ADNS5050_SDIO_PIN);
  91. gpio_write_pin_high(ADNS5050_SCLK_PIN);
  92. wait_us(1);
  93. }
  94. return byte;
  95. }
  96. void adns5050_serial_write(uint8_t data) {
  97. gpio_set_pin_output(ADNS5050_SDIO_PIN);
  98. for (int8_t b = 7; b >= 0; b--) {
  99. gpio_write_pin_low(ADNS5050_SCLK_PIN);
  100. if (data & (1 << b))
  101. gpio_write_pin_high(ADNS5050_SDIO_PIN);
  102. else
  103. gpio_write_pin_low(ADNS5050_SDIO_PIN);
  104. wait_us(2);
  105. gpio_write_pin_high(ADNS5050_SCLK_PIN);
  106. }
  107. // tSWR. See page 15 of the ADNS spec sheet.
  108. // Technically, this is only necessary if the next operation is an SDIO
  109. // read. This is not guaranteed to be the case, but we're being lazy.
  110. wait_us(4);
  111. // Note that tSWW is never necessary. All write operations require at
  112. // least 32us, which exceeds tSWW, so there's never a need to wait for it.
  113. }
  114. // Read a byte of data from a register on the ADNS.
  115. // Don't forget to use the register map (as defined in the header file).
  116. uint8_t adns5050_read_reg(uint8_t reg_addr) {
  117. adns5050_cs_select();
  118. adns5050_serial_write(reg_addr);
  119. // We don't need a minimum tSRAD here. That's because a 4ms wait time is
  120. // already included in adns5050_serial_write(), so we're good.
  121. // See page 10 and 15 of the ADNS spec sheet.
  122. // wait_us(4);
  123. uint8_t byte = adns5050_serial_read();
  124. // tSRW & tSRR. See page 15 of the ADNS spec sheet.
  125. // Technically, this is only necessary if the next operation is an SDIO
  126. // read or write. This is not guaranteed to be the case.
  127. // Honestly, this wait could probably be removed.
  128. wait_us(1);
  129. adns5050_cs_deselect();
  130. return byte;
  131. }
  132. void adns5050_write_reg(uint8_t reg_addr, uint8_t data) {
  133. adns5050_cs_select();
  134. adns5050_serial_write(0b10000000 | reg_addr);
  135. adns5050_serial_write(data);
  136. adns5050_cs_deselect();
  137. }
  138. report_adns5050_t adns5050_read_burst(void) {
  139. adns5050_cs_select();
  140. report_adns5050_t data;
  141. data.dx = 0;
  142. data.dy = 0;
  143. if (powered_down) {
  144. return data;
  145. }
  146. adns5050_serial_write(REG_MOTION_BURST);
  147. // We don't need a minimum tSRAD here. That's because a 4ms wait time is
  148. // already included in adns5050_serial_write(), so we're good.
  149. // See page 10 and 15 of the ADNS spec sheet.
  150. // wait_us(4);
  151. uint8_t x = adns5050_serial_read();
  152. uint8_t y = adns5050_serial_read();
  153. // Burst mode returns a bunch of other shit that we don't really need.
  154. // Setting CS to high ends burst mode early.
  155. adns5050_cs_deselect();
  156. data.dx = convert_twoscomp(x);
  157. data.dy = convert_twoscomp(y);
  158. return data;
  159. }
  160. // Convert a two's complement byte from an unsigned data type into a signed
  161. // data type.
  162. int8_t convert_twoscomp(uint8_t data) {
  163. if ((data & 0x80) == 0x80)
  164. return -128 + (data & 0x7F);
  165. else
  166. return data;
  167. }
  168. // Don't forget to use the definitions for CPI in the header file.
  169. void adns5050_set_cpi(uint16_t cpi) {
  170. uint8_t cpival = constrain((cpi / 125), 0x1, 0xD); // limits to 0--119
  171. adns5050_write_reg(REG_MOUSE_CONTROL2, 0b10000 | cpival);
  172. }
  173. uint16_t adns5050_get_cpi(void) {
  174. uint8_t cpival = adns5050_read_reg(REG_MOUSE_CONTROL2);
  175. return (uint16_t)((cpival & 0b10000) * 125);
  176. }
  177. bool adns5050_check_signature(void) {
  178. uint8_t pid = adns5050_read_reg(REG_PRODUCT_ID);
  179. uint8_t rid = adns5050_read_reg(REG_REVISION_ID);
  180. uint8_t pid2 = adns5050_read_reg(REG_PRODUCT_ID2);
  181. return (pid == 0x12 && rid == 0x01 && pid2 == 0x26);
  182. }
  183. void adns5050_power_down(void) {
  184. if (!powered_down) {
  185. powered_down = true;
  186. adns5050_write_reg(REG_MOUSE_CONTROL, 0b10);
  187. }
  188. }
  189. report_mouse_t adns5050_get_report(report_mouse_t mouse_report) {
  190. report_adns5050_t data = adns5050_read_burst();
  191. if (data.dx != 0 || data.dy != 0) {
  192. pd_dprintf("Raw ] X: %d, Y: %d\n", data.dx, data.dy);
  193. mouse_report.x = (mouse_xy_report_t)data.dx;
  194. mouse_report.y = (mouse_xy_report_t)data.dy;
  195. }
  196. return mouse_report;
  197. }