logo

qmk_firmware

custom branch of QMK firmware git clone https://anongit.hacktivis.me/git/qmk_firmware.git

qp_ili9486.c (12893B)


  1. // Copyright 2021 Nick Brassel (@tzarc)
  2. // Copyright 2023 Pablo Martinez (@elpekenin) <elpekenin@elpekenin.dev>
  3. // SPDX-License-Identifier: GPL-2.0-or-later
  4. #include "qp_internal.h"
  5. #include "qp_comms.h"
  6. #include "qp_ili9486.h"
  7. #include "qp_ili9xxx_opcodes.h"
  8. #include "qp_tft_panel.h"
  9. #ifdef QUANTUM_PAINTER_ILI9486_SPI_ENABLE
  10. # include "spi_master.h"
  11. # include <qp_comms_spi.h>
  12. #endif // QUANTUM_PAINTER_ILI9486_SPI_ENABLE
  13. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  14. // Common
  15. // Driver storage
  16. tft_panel_dc_reset_painter_device_t ili9486_drivers[ILI9486_NUM_DEVICES] = {0};
  17. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  18. // Initialization
  19. bool qp_ili9486_init(painter_device_t device, painter_rotation_t rotation) {
  20. // clang-format off
  21. const uint8_t ili9486_init_sequence[] = {
  22. // Command, Delay, N, Data[N]
  23. ILI9XXX_CMD_RESET, 120, 0,
  24. ILI9XXX_SET_PIX_FMT, 0, 1, 0x55,
  25. ILI9XXX_SET_PGAMMA, 0, 15, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98, 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00,
  26. ILI9XXX_SET_NGAMMA, 0, 15, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75, 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
  27. ILI9XXX_SET_POWER_CTL_1, 0, 2, 0x0D, 0x0D,
  28. ILI9XXX_SET_POWER_CTL_2, 0, 2, 0x43, 0x00,
  29. ILI9XXX_SET_POWER_CTL_3, 0, 1, 0x00,
  30. ILI9XXX_SET_VCOM_CTL_1, 0, 4, 0x00, 0x48, 0x00, 0x48,
  31. ILI9XXX_SET_INVERSION_CTL, 0, 1, 0x02,
  32. };
  33. // clang-format on
  34. qp_comms_bulk_command_sequence(device, ili9486_init_sequence, sizeof(ili9486_init_sequence));
  35. // Configure the rotation (i.e. the ordering and direction of memory writes in GRAM)
  36. const uint8_t madctl[] = {
  37. [QP_ROTATION_0] = ILI9XXX_MADCTL_BGR,
  38. [QP_ROTATION_90] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MV,
  39. [QP_ROTATION_180] = ILI9XXX_MADCTL_BGR,
  40. [QP_ROTATION_270] = ILI9XXX_MADCTL_BGR | ILI9XXX_MADCTL_MV,
  41. };
  42. const uint8_t functl[] = {
  43. [QP_ROTATION_0] = 0x42,
  44. [QP_ROTATION_90] = 0x62,
  45. [QP_ROTATION_180] = 0x22,
  46. [QP_ROTATION_270] = 0x02,
  47. };
  48. // clang-format off
  49. uint8_t rotation_sequence[] = {
  50. // Command, Delay, N, Data[N]
  51. ILI9XXX_SET_MEM_ACS_CTL, 0, 1, madctl[rotation],
  52. ILI9XXX_SET_FUNCTION_CTL, 0, 2, 0x00, functl[rotation],
  53. ILI9XXX_CMD_SLEEP_OFF, 5, 0,
  54. ILI9XXX_CMD_DISPLAY_ON, 5, 0,
  55. };
  56. // clang-format on
  57. qp_comms_bulk_command_sequence(device, rotation_sequence, sizeof(rotation_sequence));
  58. return true;
  59. }
  60. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  61. // Driver vtable
  62. // waveshare variant needs some tweaks due to shift registers
  63. static void qp_comms_spi_dc_reset_send_command_odd_cs_pulse(painter_device_t device, uint8_t cmd) {
  64. painter_driver_t * driver = (painter_driver_t *)device;
  65. qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
  66. gpio_write_pin_low(comms_config->spi_config.chip_select_pin);
  67. qp_comms_spi_dc_reset_send_command(device, cmd);
  68. gpio_write_pin_high(comms_config->spi_config.chip_select_pin);
  69. }
  70. static uint32_t qp_comms_spi_send_data_odd_cs_pulse(painter_device_t device, const void *data, uint32_t byte_count) {
  71. painter_driver_t * driver = (painter_driver_t *)device;
  72. qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
  73. uint32_t bytes_remaining = byte_count;
  74. const uint8_t *p = (const uint8_t *)data;
  75. uint32_t max_msg_length = 1024;
  76. gpio_write_pin_high(comms_config->dc_pin);
  77. while (bytes_remaining > 0) {
  78. uint32_t bytes_this_loop = QP_MIN(bytes_remaining, max_msg_length);
  79. bool odd_bytes = bytes_this_loop & 1;
  80. // send data
  81. gpio_write_pin_low(comms_config->spi_config.chip_select_pin);
  82. spi_transmit(p, bytes_this_loop);
  83. p += bytes_this_loop;
  84. // extra CS toggle, for alignment
  85. if (odd_bytes) {
  86. gpio_write_pin_high(comms_config->spi_config.chip_select_pin);
  87. gpio_write_pin_low(comms_config->spi_config.chip_select_pin);
  88. }
  89. bytes_remaining -= bytes_this_loop;
  90. }
  91. return byte_count - bytes_remaining;
  92. }
  93. static uint32_t qp_ili9486_send_data_toggling(painter_device_t device, const uint8_t *data, uint32_t byte_count) {
  94. painter_driver_t * driver = (painter_driver_t *)device;
  95. qp_comms_spi_dc_reset_config_t *comms_config = (qp_comms_spi_dc_reset_config_t *)driver->comms_config;
  96. uint32_t ret;
  97. for (uint8_t j = 0; j < byte_count; ++j) {
  98. gpio_write_pin_low(comms_config->spi_config.chip_select_pin);
  99. ret = qp_comms_spi_dc_reset_send_data(device, &data[j], 1);
  100. gpio_write_pin_high(comms_config->spi_config.chip_select_pin);
  101. }
  102. return ret;
  103. }
  104. static void qp_comms_spi_send_command_sequence_odd_cs_pulse(painter_device_t device, const uint8_t *sequence, size_t sequence_len) {
  105. for (size_t i = 0; i < sequence_len;) {
  106. uint8_t command = sequence[i];
  107. uint8_t delay = sequence[i + 1];
  108. uint8_t num_bytes = sequence[i + 2];
  109. qp_comms_spi_dc_reset_send_command_odd_cs_pulse(device, command);
  110. if (num_bytes > 0) {
  111. qp_ili9486_send_data_toggling(device, &sequence[i + 3], num_bytes);
  112. }
  113. if (delay > 0) {
  114. wait_ms(delay);
  115. }
  116. i += (3 + num_bytes);
  117. }
  118. }
  119. static bool qp_ili9486_viewport(painter_device_t device, uint16_t left, uint16_t top, uint16_t right, uint16_t bottom) {
  120. painter_driver_t * driver = (painter_driver_t *)device;
  121. tft_panel_dc_reset_painter_driver_vtable_t *vtable = (tft_panel_dc_reset_painter_driver_vtable_t *)driver->driver_vtable;
  122. // Fix up the drawing location if required
  123. left += driver->offset_x;
  124. right += driver->offset_x;
  125. top += driver->offset_y;
  126. bottom += driver->offset_y;
  127. // Check if we need to manually swap the window coordinates based on whether or not we're in a sideways rotation
  128. if (vtable->swap_window_coords && (driver->rotation == QP_ROTATION_90 || driver->rotation == QP_ROTATION_270)) {
  129. uint16_t temp;
  130. temp = left;
  131. left = top;
  132. top = temp;
  133. temp = right;
  134. right = bottom;
  135. bottom = temp;
  136. }
  137. // Set up the x-window
  138. uint8_t xbuf[4] = {left >> 8, left & 0xFF, right >> 8, right & 0xFF};
  139. qp_comms_spi_dc_reset_send_command_odd_cs_pulse(device, vtable->opcodes.set_column_address);
  140. qp_ili9486_send_data_toggling(device, xbuf, 4);
  141. // Set up the y-window
  142. uint8_t ybuf[4] = {top >> 8, top & 0xFF, bottom >> 8, bottom & 0xFF};
  143. qp_comms_spi_dc_reset_send_command_odd_cs_pulse(device, vtable->opcodes.set_row_address);
  144. qp_ili9486_send_data_toggling(device, ybuf, 4);
  145. // Lock in the window
  146. qp_comms_spi_dc_reset_send_command_odd_cs_pulse(device, vtable->opcodes.enable_writes);
  147. return true;
  148. }
  149. // Regular
  150. const tft_panel_dc_reset_painter_driver_vtable_t ili9486_driver_vtable = {
  151. .base =
  152. {
  153. .init = qp_ili9486_init,
  154. .power = qp_tft_panel_power,
  155. .clear = qp_tft_panel_clear,
  156. .flush = qp_tft_panel_flush,
  157. .pixdata = qp_tft_panel_pixdata,
  158. .viewport = qp_tft_panel_viewport,
  159. .palette_convert = qp_tft_panel_palette_convert_rgb565_swapped,
  160. .append_pixels = qp_tft_panel_append_pixels_rgb565,
  161. .append_pixdata = qp_tft_panel_append_pixdata,
  162. },
  163. .num_window_bytes = 2,
  164. .swap_window_coords = false,
  165. .opcodes =
  166. {
  167. .display_on = ILI9XXX_CMD_DISPLAY_ON,
  168. .display_off = ILI9XXX_CMD_DISPLAY_OFF,
  169. .set_column_address = ILI9XXX_SET_COL_ADDR,
  170. .set_row_address = ILI9XXX_SET_PAGE_ADDR,
  171. .enable_writes = ILI9XXX_SET_MEM,
  172. },
  173. };
  174. // Waveshare tweaks
  175. const tft_panel_dc_reset_painter_driver_vtable_t ili9486_waveshare_driver_vtable = {
  176. .base =
  177. {
  178. .init = qp_ili9486_init,
  179. .power = qp_tft_panel_power,
  180. .clear = qp_tft_panel_clear,
  181. .flush = qp_tft_panel_flush,
  182. .pixdata = qp_tft_panel_pixdata,
  183. .viewport = qp_ili9486_viewport,
  184. .palette_convert = qp_tft_panel_palette_convert_rgb565_swapped,
  185. .append_pixels = qp_tft_panel_append_pixels_rgb565,
  186. .append_pixdata = qp_tft_panel_append_pixdata,
  187. },
  188. .num_window_bytes = 2,
  189. .swap_window_coords = false,
  190. .opcodes =
  191. {
  192. .display_on = ILI9XXX_CMD_DISPLAY_ON,
  193. .display_off = ILI9XXX_CMD_DISPLAY_OFF,
  194. .set_column_address = ILI9XXX_SET_COL_ADDR,
  195. .set_row_address = ILI9XXX_SET_PAGE_ADDR,
  196. .enable_writes = ILI9XXX_SET_MEM,
  197. },
  198. };
  199. static const painter_comms_with_command_vtable_t spi_comms_odd_cs_pulse_vtable = {
  200. .base =
  201. {
  202. .comms_init = qp_comms_spi_dc_reset_init,
  203. .comms_start = qp_comms_spi_start,
  204. .comms_send = qp_comms_spi_send_data_odd_cs_pulse,
  205. .comms_stop = qp_comms_spi_stop,
  206. },
  207. .send_command = qp_comms_spi_dc_reset_send_command_odd_cs_pulse,
  208. .bulk_command_sequence = qp_comms_spi_send_command_sequence_odd_cs_pulse,
  209. };
  210. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
  211. // SPI
  212. #ifdef QUANTUM_PAINTER_ILI9486_SPI_ENABLE
  213. // Factory function for creating a handle to the ILI9486 device
  214. painter_device_t qp_ili9486_make_spi_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) {
  215. for (uint32_t i = 0; i < ILI9486_NUM_DEVICES; ++i) {
  216. tft_panel_dc_reset_painter_device_t *driver = &ili9486_drivers[i];
  217. if (!driver->base.driver_vtable) {
  218. driver->base.driver_vtable = (const painter_driver_vtable_t *)&ili9486_driver_vtable;
  219. driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_with_dc_vtable;
  220. driver->base.native_bits_per_pixel = 16; // RGB565
  221. driver->base.panel_width = panel_width;
  222. driver->base.panel_height = panel_height;
  223. driver->base.rotation = QP_ROTATION_0;
  224. driver->base.offset_x = 0;
  225. driver->base.offset_y = 0;
  226. // SPI and other pin configuration
  227. driver->base.comms_config = &driver->spi_dc_reset_config;
  228. driver->spi_dc_reset_config.spi_config.chip_select_pin = chip_select_pin;
  229. driver->spi_dc_reset_config.spi_config.divisor = spi_divisor;
  230. driver->spi_dc_reset_config.spi_config.lsb_first = false;
  231. driver->spi_dc_reset_config.spi_config.mode = spi_mode;
  232. driver->spi_dc_reset_config.dc_pin = dc_pin;
  233. driver->spi_dc_reset_config.reset_pin = reset_pin;
  234. if (!qp_internal_register_device((painter_device_t)driver)) {
  235. memset(driver, 0, sizeof(tft_panel_dc_reset_painter_device_t));
  236. return NULL;
  237. }
  238. return (painter_device_t)driver;
  239. }
  240. }
  241. return NULL;
  242. }
  243. painter_device_t qp_ili9486_make_spi_waveshare_device(uint16_t panel_width, uint16_t panel_height, pin_t chip_select_pin, pin_t dc_pin, pin_t reset_pin, uint16_t spi_divisor, int spi_mode) {
  244. painter_device_t device = qp_ili9486_make_spi_device(panel_width, panel_height, chip_select_pin, dc_pin, reset_pin, spi_divisor, spi_mode);
  245. if (device) {
  246. tft_panel_dc_reset_painter_device_t *driver = (tft_panel_dc_reset_painter_device_t *)device;
  247. driver->base.driver_vtable = (const painter_driver_vtable_t *)&ili9486_waveshare_driver_vtable;
  248. driver->base.comms_vtable = (const painter_comms_vtable_t *)&spi_comms_odd_cs_pulse_vtable;
  249. }
  250. return device;
  251. }
  252. #endif // QUANTUM_PAINTER_ILI9486_SPI_ENABLE
  253. ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////