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qmk_firmware

custom branch of QMK firmware git clone https://anongit.hacktivis.me/git/qmk_firmware.git

drv2605l.h (13118B)

    

  1. /* Copyright 2018 ishtob
  2.  * Driver for DRV2605L written for QMK
  3.  *
  4.  * This program is free software: you can redistribute it and/or modify
  5.  * it under the terms of the GNU General Public License as published by
  6.  * the Free Software Foundation, either version 2 of the License, or
  7.  * (at your option) any later version.
  8.  *
  9.  * This program is distributed in the hope that it will be useful,
  10.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12.  * GNU General Public License for more details.
  13.  *
  14.  * You should have received a copy of the GNU General Public License
  15.  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16.  */
  18. #pragma once
  20. #include <stdint.h>
  22. /* Initialization settings
  24.  * Feedback Control Settings */
  25. #ifndef DRV2605L_FB_ERM_LRA
  26. #    define DRV2605L_FB_ERM_LRA 1 /* For ERM:0 or LRA:1*/
  27. #endif
  28. #ifndef DRV2605L_FB_BRAKEFACTOR
  29. #    define DRV2605L_FB_BRAKEFACTOR 3 /* For 1x:0, 2x:1, 3x:2, 4x:3, 6x:4, 8x:5, 16x:6, Disable Braking:7 */
  30. #endif
  31. #ifndef DRV2605L_FB_LOOPGAIN
  32. #    define DRV2605L_FB_LOOPGAIN 1 /* For  Low:0, Medium:1, High:2, Very High:3 */
  33. #endif
  35. /* LRA specific settings */
  36. #if DRV2605L_FB_ERM_LRA == 1
  37. #    ifndef DRV2605L_V_RMS
  38. #        define DRV2605L_V_RMS 2.0
  39. #    endif
  40. #    ifndef DRV2605L_V_PEAK
  41. #        define DRV2605L_V_PEAK 2.1
  42. #    endif
  43. #    ifndef DRV2605L_F_LRA
  44. #        define DRV2605L_F_LRA 205
  45. #    endif
  46. #    ifndef DRV2605L_RATED_VOLTAGE
  47. #        define DRV2605L_RATED_VOLTAGE 2 /* 2v as safe range in case device voltage is not set */
  48. #    endif
  49. #endif
  51. #ifndef DRV2605L_RATED_VOLTAGE
  52. #    define DRV2605L_RATED_VOLTAGE 2 /* 2v as safe range in case device voltage is not set */
  53. #endif
  54. #ifndef DRV2605L_V_PEAK
  55. #    define DRV2605L_V_PEAK 2.8
  56. #endif
  58. /* Library Selection */
  59. #ifndef DRV2605L_LIBRARY
  60. #    if DRV2605L_FB_ERM_LRA == 1
  61. #        define DRV2605L_LIBRARY 6 /* For Empty:0' TS2200 library A to D:1-5, LRA Library: 6 */
  62. #    else
  63. #        define DRV2605L_LIBRARY 1
  64. #    endif
  65. #endif
  67. #ifndef DRV2605L_GREETING
  68. #    define DRV2605L_GREETING DRV2605L_EFFECT_750_MS_ALERT_100
  69. #endif
  70. #ifndef DRV2605L_DEFAULT_MODE
  71. #    define DRV2605L_DEFAULT_MODE DRV2605L_EFFECT_STRONG_CLICK_1_100
  72. #endif
  74. /* Control 1 register settings */
  75. #ifndef DRV2605L_DRIVE_TIME
  76. #    define DRV2605L_DRIVE_TIME 25
  77. #endif
  78. #ifndef DRV2605L_AC_COUPLE
  79. #    define DRV2605L_AC_COUPLE 0
  80. #endif
  81. #ifndef DRV2605L_STARTUP_BOOST
  82. #    define DRV2605L_STARTUP_BOOST 1
  83. #endif
  85. /* Control 2 Settings */
  86. #ifndef DRV2605L_BIDIR_INPUT
  87. #    define DRV2605L_BIDIR_INPUT 1
  88. #endif
  89. #ifndef DRV2605L_BRAKE_STAB
  90. #    define DRV2605L_BRAKE_STAB 1 /* Loopgain is reduced when braking is almost complete to improve stability */
  91. #endif
  92. #ifndef DRV2605L_SAMPLE_TIME
  93. #    define DRV2605L_SAMPLE_TIME 3
  94. #endif
  95. #ifndef DRV2605L_BLANKING_TIME
  96. #    define DRV2605L_BLANKING_TIME 1
  97. #endif
  98. #ifndef DRV2605L_IDISS_TIME
  99. #    define DRV2605L_IDISS_TIME 1
  100. #endif
  102. /* Control 3 settings */
  103. #ifndef DRV2605L_NG_THRESH
  104. #    define DRV2605L_NG_THRESH 2
  105. #endif
  106. #ifndef DRV2605L_ERM_OPEN_LOOP
  107. #    define DRV2605L_ERM_OPEN_LOOP 1
  108. #endif
  109. #ifndef DRV2605L_SUPPLY_COMP_DIS
  110. #    define DRV2605L_SUPPLY_COMP_DIS 0
  111. #endif
  112. #ifndef DRV2605L_DATA_FORMAT_RTO
  113. #    define DRV2605L_DATA_FORMAT_RTO 0
  114. #endif
  115. #ifndef DRV2605L_LRA_DRIVE_MODE
  116. #    define DRV2605L_LRA_DRIVE_MODE 0
  117. #endif
  118. #ifndef DRV2605L_N_PWM_ANALOG
  119. #    define DRV2605L_N_PWM_ANALOG 0
  120. #endif
  121. #ifndef DRV2605L_LRA_OPEN_LOOP
  122. #    define DRV2605L_LRA_OPEN_LOOP 0
  123. #endif
  125. /* Control 4 settings */
  126. #ifndef DRV2605L_ZC_DET_TIME
  127. #    define DRV2605L_ZC_DET_TIME 0
  128. #endif
  129. #ifndef DRV2605L_AUTO_CAL_TIME
  130. #    define DRV2605L_AUTO_CAL_TIME 3
  131. #endif
  133. #define DRV2605L_I2C_ADDRESS 0x5A
  135. #define DRV2605L_REG_STATUS 0x00
  136. #define DRV2605L_REG_MODE 0x01
  137. #define DRV2605L_REG_RTP_INPUT 0x02
  138. #define DRV2605L_REG_LIBRARY_SELECTION 0x03
  139. #define DRV2605L_REG_WAVEFORM_SEQUENCER_1 0x04
  140. #define DRV2605L_REG_WAVEFORM_SEQUENCER_2 0x05
  141. #define DRV2605L_REG_WAVEFORM_SEQUENCER_3 0x06
  142. #define DRV2605L_REG_WAVEFORM_SEQUENCER_4 0x07
  143. #define DRV2605L_REG_WAVEFORM_SEQUENCER_5 0x08
  144. #define DRV2605L_REG_WAVEFORM_SEQUENCER_6 0x09
  145. #define DRV2605L_REG_WAVEFORM_SEQUENCER_7 0x0A
  146. #define DRV2605L_REG_WAVEFORM_SEQUENCER_8 0x0B
  147. #define DRV2605L_REG_GO 0x0C
  148. #define DRV2605L_REG_OVERDRIVE_TIME_OFFSET 0x0D
  149. #define DRV2605L_REG_SUSTAIN_TIME_OFFSET_P 0x0E
  150. #define DRV2605L_REG_SUSTAIN_TIME_OFFSET_N 0x0F
  151. #define DRV2605L_REG_BRAKE_TIME_OFFSET 0x10
  152. #define DRV2605L_REG_AUDIO_TO_VIBE_CTRL 0x11
  153. #define DRV2605L_REG_AUDIO_TO_VIBE_MIN_INPUT 0x12
  154. #define DRV2605L_REG_AUDIO_TO_VIBE_MAX_INPUT 0x13
  155. #define DRV2605L_REG_AUDIO_TO_VIBE_MIN_OUTPUT_DRIVE 0x14
  156. #define DRV2605L_REG_AUDIO_TO_VIBE_MAX_OUTPUT_DRIVE 0x15
  157. #define DRV2605L_REG_RATED_VOLTAGE 0x16
  158. #define DRV2605L_REG_OVERDRIVE_CLAMP_VOLTAGE 0x17
  159. #define DRV2605L_REG_AUTO_CALIBRATION_COMPENSATION_RESULT 0x18
  160. #define DRV2605L_REG_AUTO_CALIBRATION_BACK_EMF_RESULT 0x19
  161. #define DRV2605L_REG_FEEDBACK_CTRL 0x1A
  162. #define DRV2605L_REG_CTRL1 0x1B
  163. #define DRV2605L_REG_CTRL2 0x1C
  164. #define DRV2605L_REG_CTRL3 0x1D
  165. #define DRV2605L_REG_CTRL4 0x1E
  166. #define DRV2605L_REG_CTRL5 0x1F
  167. #define DRV2605L_REG_LRA_OPEN_LOOP_PERIOD 0x20
  168. #define DRV2605L_REG_VBAT_VOLTAGE_MONITOR 0x21
  169. #define DRV2605L_REG_LRA_RESONANCE_PERIOD 0x22
  171. void    drv2605l_init(void);
  172. void    drv2605l_write(const uint8_t reg_addr, const uint8_t data);
  173. uint8_t drv2605l_read(const uint8_t reg_addr);
  174. void    drv2605l_rtp_init(void);
  175. void    drv2605l_amplitude(const uint8_t amplitude);
  176. void    drv2605l_pulse(const uint8_t sequence);
  178. typedef enum drv2605l_effect_t {
  179.     DRV2605L_EFFECT_CLEAR_SEQUENCE,
  180.     DRV2605L_EFFECT_STRONG_CLICK_100,
  181.     DRV2605L_EFFECT_STRONG_CLICK_60,
  182.     DRV2605L_EFFECT_STRONG_CLICK_30,
  183.     DRV2605L_EFFECT_SHARP_CLICK_100,
  184.     DRV2605L_EFFECT_SHARP_CLICK_60,
  185.     DRV2605L_EFFECT_SHARP_CLICK_30,
  186.     DRV2605L_EFFECT_SOFT_BUMP_100,
  187.     DRV2605L_EFFECT_SOFT_BUMP_60,
  188.     DRV2605L_EFFECT_SOFT_BUMP_30,
  189.     DRV2605L_EFFECT_DOUBLE_CLICK_100,
  190.     DRV2605L_EFFECT_DOUBLE_CLICK_60,
  191.     DRV2605L_EFFECT_TRIPLE_CLICK_100,
  192.     DRV2605L_EFFECT_SOFT_FUZZ_60,
  193.     DRV2605L_EFFECT_STRONG_BUZZ_100,
  194.     DRV2605L_EFFECT_750_MS_ALERT_100,
  195.     DRV2605L_EFFECT_1000_MS_ALERT_100,
  196.     DRV2605L_EFFECT_STRONG_CLICK_1_100,
  197.     DRV2605L_EFFECT_STRONG_CLICK_2_80,
  198.     DRV2605L_EFFECT_STRONG_CLICK_3_60,
  199.     DRV2605L_EFFECT_STRONG_CLICK_4_30,
  200.     DRV2605L_EFFECT_MEDIUM_CLICK_1_100,
  201.     DRV2605L_EFFECT_MEDIUM_CLICK_2_80,
  202.     DRV2605L_EFFECT_MEDIUM_CLICK_3_60,
  203.     DRV2605L_EFFECT_SHARP_TICK_1_100,
  204.     DRV2605L_EFFECT_SHARP_TICK_2_80,
  205.     DRV2605L_EFFECT_SHARP_TICK_3_60,
  206.     DRV2605L_EFFECT_SHORT_DOUBLE_CLICK_STRONG_1_100,
  207.     DRV2605L_EFFECT_SHORT_DOUBLE_CLICK_STRONG_2_80,
  208.     DRV2605L_EFFECT_SHORT_DOUBLE_CLICK_STRONG_3_60,
  209.     DRV2605L_EFFECT_SHORT_DOUBLE_CLICK_STRONG_4_30,
  210.     DRV2605L_EFFECT_SHORT_DOUBLE_CLICK_MEDIUM_1_100,
  211.     DRV2605L_EFFECT_SHORT_DOUBLE_CLICK_MEDIUM_2_80,
  212.     DRV2605L_EFFECT_SHORT_DOUBLE_CLICK_MEDIUM_3_60,
  213.     DRV2605L_EFFECT_SHORT_DOUBLE_SHARP_TICK_1_100,
  214.     DRV2605L_EFFECT_SHORT_DOUBLE_SHARP_TICK_2_80,
  215.     DRV2605L_EFFECT_SHORT_DOUBLE_SHARP_TICK_3_60,
  216.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_CLICK_STRONG_1_100,
  217.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_CLICK_STRONG_2_80,
  218.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_CLICK_STRONG_3_60,
  219.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_CLICK_STRONG_4_30,
  220.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_CLICK_MEDIUM_1_100,
  221.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_CLICK_MEDIUM_2_80,
  222.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_CLICK_MEDIUM_3_60,
  223.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_TICK_1_100,
  224.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_TICK_2_80,
  225.     DRV2605L_EFFECT_LONG_DOUBLE_SHARP_TICK_3_60,
  226.     DRV2605L_EFFECT_BUZZ_1_100,
  227.     DRV2605L_EFFECT_BUZZ_2_80,
  228.     DRV2605L_EFFECT_BUZZ_3_60,
  229.     DRV2605L_EFFECT_BUZZ_4_40,
  230.     DRV2605L_EFFECT_BUZZ_5_20,
  231.     DRV2605L_EFFECT_PULSING_STRONG_1_100,
  232.     DRV2605L_EFFECT_PULSING_STRONG_2_60,
  233.     DRV2605L_EFFECT_PULSING_MEDIUM_1_100,
  234.     DRV2605L_EFFECT_PULSING_MEDIUM_2_60,
  235.     DRV2605L_EFFECT_PULSING_SHARP_1_100,
  236.     DRV2605L_EFFECT_PULSING_SHARP_2_60,
  237.     DRV2605L_EFFECT_TRANSITION_CLICK_1_100,
  238.     DRV2605L_EFFECT_TRANSITION_CLICK_2_80,
  239.     DRV2605L_EFFECT_TRANSITION_CLICK_3_60,
  240.     DRV2605L_EFFECT_TRANSITION_CLICK_4_40,
  241.     DRV2605L_EFFECT_TRANSITION_CLICK_5_20,
  242.     DRV2605L_EFFECT_TRANSITION_CLICK_6_10,
  243.     DRV2605L_EFFECT_TRANSITION_HUM_1_100,
  244.     DRV2605L_EFFECT_TRANSITION_HUM_2_80,
  245.     DRV2605L_EFFECT_TRANSITION_HUM_3_60,
  246.     DRV2605L_EFFECT_TRANSITION_HUM_4_40,
  247.     DRV2605L_EFFECT_TRANSITION_HUM_5_20,
  248.     DRV2605L_EFFECT_TRANSITION_HUM_6_10,
  249.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_LONG_SMOOTH_1_100,
  250.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_LONG_SMOOTH_2_100,
  251.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_MEDIUM_SMOOTH_1_100,
  252.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_MEDIUM_SMOOTH_2_100,
  253.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_SHORT_SMOOTH_1_100,
  254.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_SHORT_SMOOTH_2_100,
  255.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_LONG_SHARP_1_100,
  256.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_LONG_SHARP_2_100,
  257.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_MEDIUM_SHARP_1_100,
  258.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_MEDIUM_SHARP_2_100,
  259.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_SHORT_SHARP_1_100,
  260.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_SHORT_SHARP_2_100,
  261.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_LONG_SMOOTH_1_100,
  262.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_LONG_SMOOTH_2_100,
  263.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_MEDIUM_SMOOTH_1_100,
  264.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_MEDIUM_SMOOTH_2_100,
  265.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_SHORT_SMOOTH_1_100,
  266.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_SHORT_SMOOTH_2_100,
  267.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_LONG_SHARP_1_100,
  268.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_LONG_SHARP_2_100,
  269.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_MEDIUM_SHARP_1_100,
  270.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_MEDIUM_SHARP_2_100,
  271.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_SHORT_SHARP_1_100,
  272.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_SHORT_SHARP_2_100,
  273.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_LONG_SMOOTH_1_50,
  274.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_LONG_SMOOTH_2_50,
  275.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_MEDIUM_SMOOTH_1_50,
  276.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_MEDIUM_SMOOTH_2_50,
  277.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_SHORT_SMOOTH_1_50,
  278.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_SHORT_SMOOTH_2_50,
  279.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_LONG_SHARP_1_50,
  280.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_LONG_SHARP_2_50,
  281.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_MEDIUM_SHARP_1_50,
  282.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_MEDIUM_SHARP_2_50,
  283.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_SHORT_SHARP_1_50,
  284.     DRV2605L_EFFECT_TRANSITION_RAMP_DOWN_SHORT_SHARP_2_50,
  285.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_LONG_SMOOTH_1_50,
  286.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_LONG_SMOOTH_2_50,
  287.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_MEDIUM_SMOOTH_1_50,
  288.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_MEDIUM_SMOOTH_2_50,
  289.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_SHORT_SMOOTH_1_50,
  290.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_SHORT_SMOOTH_2_50,
  291.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_LONG_SHARP_1_50,
  292.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_LONG_SHARP_2_50,
  293.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_MEDIUM_SHARP_1_50,
  294.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_MEDIUM_SHARP_2_50,
  295.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_SHORT_SHARP_1_50,
  296.     DRV2605L_EFFECT_TRANSITION_RAMP_UP_SHORT_SHARP_2_50,
  297.     DRV2605L_EFFECT_LONG_BUZZ_FOR_PROGRAMMATIC_STOPPING,
  298.     DRV2605L_EFFECT_SMOOTH_HUM_1_50,
  299.     DRV2605L_EFFECT_SMOOTH_HUM_2_40,
  300.     DRV2605L_EFFECT_SMOOTH_HUM_3_30,
  301.     DRV2605L_EFFECT_SMOOTH_HUM_4_20,
  302.     DRV2605L_EFFECT_SMOOTH_HUM_5_10,
  303.     DRV2605L_EFFECT_COUNT
  304. } drv2605l_effect_t;
  306. /* Register bit array unions */
  308. typedef union { /* register 0x1A */
  309.     uint8_t raw;
  310.     struct {
  311.         uint8_t BEMF_GAIN : 2;
  312.         uint8_t LOOP_GAIN : 2;
  313.         uint8_t BRAKE_FACTOR : 3;
  314.         uint8_t ERM_LRA : 1;
  315.     } bits;
  316. } drv2605l_reg_feedback_ctrl_t;
  318. typedef union { /* register 0x1B */
  319.     uint8_t raw;
  320.     struct {
  321.         uint8_t C1_DRIVE_TIME : 5;
  322.         uint8_t C1_AC_COUPLE : 1;
  323.         uint8_t : 1;
  324.         uint8_t C1_STARTUP_BOOST : 1;
  325.     } bits;
  326. } drv2605l_reg_ctrl1_t;
  328. typedef union { /* register 0x1C */
  329.     uint8_t raw;
  330.     struct {
  331.         uint8_t C2_IDISS_TIME : 2;
  332.         uint8_t C2_BLANKING_TIME : 2;
  333.         uint8_t C2_SAMPLE_TIME : 2;
  334.         uint8_t C2_BRAKE_STAB : 1;
  335.         uint8_t C2_BIDIR_INPUT : 1;
  336.     } bits;
  337. } drv2605l_reg_ctrl2_t;
  339. typedef union { /* register 0x1D */
  340.     uint8_t raw;
  341.     struct {
  342.         uint8_t C3_LRA_OPEN_LOOP : 1;
  343.         uint8_t C3_N_PWM_ANALOG : 1;
  344.         uint8_t C3_LRA_DRIVE_MODE : 1;
  345.         uint8_t C3_DATA_FORMAT_RTO : 1;
  346.         uint8_t C3_SUPPLY_COMP_DIS : 1;
  347.         uint8_t C3_ERM_OPEN_LOOP : 1;
  348.         uint8_t C3_NG_THRESH : 2;
  349.     } bits;
  350. } drv2605l_reg_ctrl3_t;
  352. typedef union { /* register 0x1E */
  353.     uint8_t raw;
  354.     struct {
  355.         uint8_t C4_OTP_PROGRAM : 1;
  356.         uint8_t : 1;
  357.         uint8_t C4_OTP_STATUS : 1;
  358.         uint8_t : 1;
  359.         uint8_t C4_AUTO_CAL_TIME : 2;
  360.         uint8_t C4_ZC_DET_TIME : 2;
  361.     } bits;
  362. } drv2605l_reg_ctrl4_t;