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oasis-root

Compiled tree of Oasis Linux based on own branch at <https://hacktivis.me/git/oasis/> git clone https://anongit.hacktivis.me/git/oasis-root.git

serial_core.h (5046B)


  1. /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
  2. /*
  3. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  4. */
  5. #ifndef LINUX_SERIAL_CORE_H
  6. #define LINUX_SERIAL_CORE_H
  7. #include <linux/serial.h>
  8. /*
  9. * The type definitions. These are from Ted Ts'o's serial.h
  10. * By historical reasons the values from 0 to 13 are defined
  11. * in the include/uapi/linux/serial.h, do not define them here.
  12. * Values 0 to 19 are used by setserial from busybox and must never
  13. * be modified.
  14. */
  15. #define PORT_NS16550A 14
  16. #define PORT_XSCALE 15
  17. #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
  18. #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
  19. #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
  20. #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
  21. #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
  22. #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
  23. #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
  24. #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */
  25. #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
  26. #define PORT_BRCM_TRUMANAGE 25
  27. #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
  28. #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
  29. #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
  30. #define PORT_RT2880 29 /* Ralink RT2880 internal UART */
  31. #define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */
  32. /*
  33. * ARM specific type numbers. These are not currently guaranteed
  34. * to be implemented, and will change in the future. These are
  35. * separate so any additions to the old serial.c that occur before
  36. * we are merged can be easily merged here.
  37. */
  38. #define PORT_PXA 31
  39. #define PORT_AMBA 32
  40. #define PORT_CLPS711X 33
  41. #define PORT_SA1100 34
  42. #define PORT_UART00 35
  43. #define PORT_OWL 36
  44. #define PORT_21285 37
  45. /* Sparc type numbers. */
  46. #define PORT_SUNZILOG 38
  47. #define PORT_SUNSAB 39
  48. /* Nuvoton UART */
  49. #define PORT_NPCM 40
  50. /* NVIDIA Tegra Combined UART */
  51. #define PORT_TEGRA_TCU 41
  52. /* ASPEED AST2x00 virtual UART */
  53. #define PORT_ASPEED_VUART 42
  54. /* Intel EG20 */
  55. #define PORT_PCH_8LINE 44
  56. #define PORT_PCH_2LINE 45
  57. /* DEC */
  58. #define PORT_DZ 46
  59. #define PORT_ZS 47
  60. /* Parisc type numbers. */
  61. #define PORT_MUX 48
  62. /* Atmel AT91 SoC */
  63. #define PORT_ATMEL 49
  64. /* Macintosh Zilog type numbers */
  65. #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
  66. #define PORT_PMAC_ZILOG 51
  67. /* SH-SCI */
  68. #define PORT_SCI 52
  69. #define PORT_SCIF 53
  70. #define PORT_IRDA 54
  71. /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
  72. #define PORT_IP22ZILOG 56
  73. /* PPC CPM type number */
  74. #define PORT_CPM 58
  75. /* MPC52xx (and MPC512x) type numbers */
  76. #define PORT_MPC52xx 59
  77. /* IBM icom */
  78. #define PORT_ICOM 60
  79. /* Motorola i.MX SoC */
  80. #define PORT_IMX 62
  81. /* TXX9 type number */
  82. #define PORT_TXX9 64
  83. /*Digi jsm */
  84. #define PORT_JSM 69
  85. /* SUN4V Hypervisor Console */
  86. #define PORT_SUNHV 72
  87. /* Xilinx uartlite */
  88. #define PORT_UARTLITE 74
  89. /* Broadcom BCM7271 UART */
  90. #define PORT_BCM7271 76
  91. /* Broadcom SB1250, etc. SOC */
  92. #define PORT_SB1250_DUART 77
  93. /* Freescale ColdFire */
  94. #define PORT_MCF 78
  95. #define PORT_SC26XX 82
  96. /* SH-SCI */
  97. #define PORT_SCIFA 83
  98. #define PORT_S3C6400 84
  99. /* MAX3100 */
  100. #define PORT_MAX3100 86
  101. /* Timberdale UART */
  102. #define PORT_TIMBUART 87
  103. /* Qualcomm MSM SoCs */
  104. #define PORT_MSM 88
  105. /* BCM63xx family SoCs */
  106. #define PORT_BCM63XX 89
  107. /* Aeroflex Gaisler GRLIB APBUART */
  108. #define PORT_APBUART 90
  109. /* Altera UARTs */
  110. #define PORT_ALTERA_JTAGUART 91
  111. #define PORT_ALTERA_UART 92
  112. /* SH-SCI */
  113. #define PORT_SCIFB 93
  114. /* MAX310X */
  115. #define PORT_MAX310X 94
  116. /* TI DA8xx/66AK2x */
  117. #define PORT_DA830 95
  118. /* TI OMAP-UART */
  119. #define PORT_OMAP 96
  120. /* VIA VT8500 SoC */
  121. #define PORT_VT8500 97
  122. /* Cadence (Xilinx Zynq) UART */
  123. #define PORT_XUARTPS 98
  124. /* Atheros AR933X SoC */
  125. #define PORT_AR933X 99
  126. /* MCHP 16550A UART with 256 byte FIFOs */
  127. #define PORT_MCHP16550A 100
  128. /* ARC (Synopsys) on-chip UART */
  129. #define PORT_ARC 101
  130. /* Rocketport EXPRESS/INFINITY */
  131. #define PORT_RP2 102
  132. /* Freescale lpuart */
  133. #define PORT_LPUART 103
  134. /* SH-SCI */
  135. #define PORT_HSCIF 104
  136. /* ST ASC type numbers */
  137. #define PORT_ASC 105
  138. /* MEN 16z135 UART */
  139. #define PORT_MEN_Z135 107
  140. /* SC16IS7xx */
  141. #define PORT_SC16IS7XX 108
  142. /* MESON */
  143. #define PORT_MESON 109
  144. /* Conexant Digicolor */
  145. #define PORT_DIGICOLOR 110
  146. /* SPRD SERIAL */
  147. #define PORT_SPRD 111
  148. /* STM32 USART */
  149. #define PORT_STM32 113
  150. /* MVEBU UART */
  151. #define PORT_MVEBU 114
  152. /* Microchip PIC32 UART */
  153. #define PORT_PIC32 115
  154. /* MPS2 UART */
  155. #define PORT_MPS2UART 116
  156. /* MediaTek BTIF */
  157. #define PORT_MTK_BTIF 117
  158. /* RDA UART */
  159. #define PORT_RDA 118
  160. /* Socionext Milbeaut UART */
  161. #define PORT_MLB_USIO 119
  162. /* SiFive UART */
  163. #define PORT_SIFIVE_V0 120
  164. /* Sunix UART */
  165. #define PORT_SUNIX 121
  166. /* Freescale LINFlexD UART */
  167. #define PORT_LINFLEXUART 122
  168. /* Sunplus UART */
  169. #define PORT_SUNPLUS 123
  170. /* Generic type identifier for ports which type is not important to userspace. */
  171. #define PORT_GENERIC (-1)
  172. #endif /* LINUX_SERIAL_CORE_H */