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Compiled tree of Oasis Linux based on own branch at <https://hacktivis.me/git/oasis/> git clone https://anongit.hacktivis.me/git/oasis-root.git

drm.h (45668B)


  1. /*
  2. * Header for the Direct Rendering Manager
  3. *
  4. * Author: Rickard E. (Rik) Faith <faith@valinux.com>
  5. *
  6. * Acknowledgments:
  7. * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
  8. */
  9. /*
  10. * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  11. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  12. * All rights reserved.
  13. *
  14. * Permission is hereby granted, free of charge, to any person obtaining a
  15. * copy of this software and associated documentation files (the "Software"),
  16. * to deal in the Software without restriction, including without limitation
  17. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  18. * and/or sell copies of the Software, and to permit persons to whom the
  19. * Software is furnished to do so, subject to the following conditions:
  20. *
  21. * The above copyright notice and this permission notice (including the next
  22. * paragraph) shall be included in all copies or substantial portions of the
  23. * Software.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  26. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  27. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  28. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  29. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  30. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  31. * OTHER DEALINGS IN THE SOFTWARE.
  32. */
  33. #ifndef _DRM_H_
  34. #define _DRM_H_
  35. #if defined(__linux__)
  36. #include <linux/types.h>
  37. #include <asm/ioctl.h>
  38. typedef unsigned int drm_handle_t;
  39. #else /* One of the BSDs */
  40. #include <stdint.h>
  41. #include <sys/ioccom.h>
  42. #include <sys/types.h>
  43. typedef int8_t __s8;
  44. typedef uint8_t __u8;
  45. typedef int16_t __s16;
  46. typedef uint16_t __u16;
  47. typedef int32_t __s32;
  48. typedef uint32_t __u32;
  49. typedef int64_t __s64;
  50. typedef uint64_t __u64;
  51. typedef size_t __kernel_size_t;
  52. typedef unsigned long drm_handle_t;
  53. #endif
  54. #if defined(__cplusplus)
  55. extern "C" {
  56. #endif
  57. #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
  58. #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
  59. #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
  60. #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
  61. #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
  62. #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
  63. #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
  64. #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
  65. #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
  66. typedef unsigned int drm_context_t;
  67. typedef unsigned int drm_drawable_t;
  68. typedef unsigned int drm_magic_t;
  69. /*
  70. * Cliprect.
  71. *
  72. * \warning: If you change this structure, make sure you change
  73. * XF86DRIClipRectRec in the server as well
  74. *
  75. * \note KW: Actually it's illegal to change either for
  76. * backwards-compatibility reasons.
  77. */
  78. struct drm_clip_rect {
  79. unsigned short x1;
  80. unsigned short y1;
  81. unsigned short x2;
  82. unsigned short y2;
  83. };
  84. /*
  85. * Drawable information.
  86. */
  87. struct drm_drawable_info {
  88. unsigned int num_rects;
  89. struct drm_clip_rect *rects;
  90. };
  91. /*
  92. * Texture region,
  93. */
  94. struct drm_tex_region {
  95. unsigned char next;
  96. unsigned char prev;
  97. unsigned char in_use;
  98. unsigned char padding;
  99. unsigned int age;
  100. };
  101. /*
  102. * Hardware lock.
  103. *
  104. * The lock structure is a simple cache-line aligned integer. To avoid
  105. * processor bus contention on a multiprocessor system, there should not be any
  106. * other data stored in the same cache line.
  107. */
  108. struct drm_hw_lock {
  109. __volatile__ unsigned int lock; /**< lock variable */
  110. char padding[60]; /**< Pad to cache line */
  111. };
  112. /*
  113. * DRM_IOCTL_VERSION ioctl argument type.
  114. *
  115. * \sa drmGetVersion().
  116. */
  117. struct drm_version {
  118. int version_major; /**< Major version */
  119. int version_minor; /**< Minor version */
  120. int version_patchlevel; /**< Patch level */
  121. __kernel_size_t name_len; /**< Length of name buffer */
  122. char *name; /**< Name of driver */
  123. __kernel_size_t date_len; /**< Length of date buffer */
  124. char *date; /**< User-space buffer to hold date */
  125. __kernel_size_t desc_len; /**< Length of desc buffer */
  126. char *desc; /**< User-space buffer to hold desc */
  127. };
  128. /*
  129. * DRM_IOCTL_GET_UNIQUE ioctl argument type.
  130. *
  131. * \sa drmGetBusid() and drmSetBusId().
  132. */
  133. struct drm_unique {
  134. __kernel_size_t unique_len; /**< Length of unique */
  135. char *unique; /**< Unique name for driver instantiation */
  136. };
  137. struct drm_list {
  138. int count; /**< Length of user-space structures */
  139. struct drm_version *version;
  140. };
  141. struct drm_block {
  142. int unused;
  143. };
  144. /*
  145. * DRM_IOCTL_CONTROL ioctl argument type.
  146. *
  147. * \sa drmCtlInstHandler() and drmCtlUninstHandler().
  148. */
  149. struct drm_control {
  150. enum {
  151. DRM_ADD_COMMAND,
  152. DRM_RM_COMMAND,
  153. DRM_INST_HANDLER,
  154. DRM_UNINST_HANDLER
  155. } func;
  156. int irq;
  157. };
  158. /*
  159. * Type of memory to map.
  160. */
  161. enum drm_map_type {
  162. _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
  163. _DRM_REGISTERS = 1, /**< no caching, no core dump */
  164. _DRM_SHM = 2, /**< shared, cached */
  165. _DRM_AGP = 3, /**< AGP/GART */
  166. _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
  167. _DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */
  168. };
  169. /*
  170. * Memory mapping flags.
  171. */
  172. enum drm_map_flags {
  173. _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
  174. _DRM_READ_ONLY = 0x02,
  175. _DRM_LOCKED = 0x04, /**< shared, cached, locked */
  176. _DRM_KERNEL = 0x08, /**< kernel requires access */
  177. _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
  178. _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
  179. _DRM_REMOVABLE = 0x40, /**< Removable mapping */
  180. _DRM_DRIVER = 0x80 /**< Managed by driver */
  181. };
  182. struct drm_ctx_priv_map {
  183. unsigned int ctx_id; /**< Context requesting private mapping */
  184. void *handle; /**< Handle of map */
  185. };
  186. /*
  187. * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
  188. * argument type.
  189. *
  190. * \sa drmAddMap().
  191. */
  192. struct drm_map {
  193. unsigned long offset; /**< Requested physical address (0 for SAREA)*/
  194. unsigned long size; /**< Requested physical size (bytes) */
  195. enum drm_map_type type; /**< Type of memory to map */
  196. enum drm_map_flags flags; /**< Flags */
  197. void *handle; /**< User-space: "Handle" to pass to mmap() */
  198. /**< Kernel-space: kernel-virtual address */
  199. int mtrr; /**< MTRR slot used */
  200. /* Private data */
  201. };
  202. /*
  203. * DRM_IOCTL_GET_CLIENT ioctl argument type.
  204. */
  205. struct drm_client {
  206. int idx; /**< Which client desired? */
  207. int auth; /**< Is client authenticated? */
  208. unsigned long pid; /**< Process ID */
  209. unsigned long uid; /**< User ID */
  210. unsigned long magic; /**< Magic */
  211. unsigned long iocs; /**< Ioctl count */
  212. };
  213. enum drm_stat_type {
  214. _DRM_STAT_LOCK,
  215. _DRM_STAT_OPENS,
  216. _DRM_STAT_CLOSES,
  217. _DRM_STAT_IOCTLS,
  218. _DRM_STAT_LOCKS,
  219. _DRM_STAT_UNLOCKS,
  220. _DRM_STAT_VALUE, /**< Generic value */
  221. _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
  222. _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
  223. _DRM_STAT_IRQ, /**< IRQ */
  224. _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
  225. _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
  226. _DRM_STAT_DMA, /**< DMA */
  227. _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
  228. _DRM_STAT_MISSED /**< Missed DMA opportunity */
  229. /* Add to the *END* of the list */
  230. };
  231. /*
  232. * DRM_IOCTL_GET_STATS ioctl argument type.
  233. */
  234. struct drm_stats {
  235. unsigned long count;
  236. struct {
  237. unsigned long value;
  238. enum drm_stat_type type;
  239. } data[15];
  240. };
  241. /*
  242. * Hardware locking flags.
  243. */
  244. enum drm_lock_flags {
  245. _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
  246. _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
  247. _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
  248. _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
  249. /* These *HALT* flags aren't supported yet
  250. -- they will be used to support the
  251. full-screen DGA-like mode. */
  252. _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
  253. _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
  254. };
  255. /*
  256. * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
  257. *
  258. * \sa drmGetLock() and drmUnlock().
  259. */
  260. struct drm_lock {
  261. int context;
  262. enum drm_lock_flags flags;
  263. };
  264. /*
  265. * DMA flags
  266. *
  267. * \warning
  268. * These values \e must match xf86drm.h.
  269. *
  270. * \sa drm_dma.
  271. */
  272. enum drm_dma_flags {
  273. /* Flags for DMA buffer dispatch */
  274. _DRM_DMA_BLOCK = 0x01, /**<
  275. * Block until buffer dispatched.
  276. *
  277. * \note The buffer may not yet have
  278. * been processed by the hardware --
  279. * getting a hardware lock with the
  280. * hardware quiescent will ensure
  281. * that the buffer has been
  282. * processed.
  283. */
  284. _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
  285. _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
  286. /* Flags for DMA buffer request */
  287. _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
  288. _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
  289. _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
  290. };
  291. /*
  292. * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
  293. *
  294. * \sa drmAddBufs().
  295. */
  296. struct drm_buf_desc {
  297. int count; /**< Number of buffers of this size */
  298. int size; /**< Size in bytes */
  299. int low_mark; /**< Low water mark */
  300. int high_mark; /**< High water mark */
  301. enum {
  302. _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
  303. _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
  304. _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
  305. _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
  306. _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
  307. } flags;
  308. unsigned long agp_start; /**<
  309. * Start address of where the AGP buffers are
  310. * in the AGP aperture
  311. */
  312. };
  313. /*
  314. * DRM_IOCTL_INFO_BUFS ioctl argument type.
  315. */
  316. struct drm_buf_info {
  317. int count; /**< Entries in list */
  318. struct drm_buf_desc *list;
  319. };
  320. /*
  321. * DRM_IOCTL_FREE_BUFS ioctl argument type.
  322. */
  323. struct drm_buf_free {
  324. int count;
  325. int *list;
  326. };
  327. /*
  328. * Buffer information
  329. *
  330. * \sa drm_buf_map.
  331. */
  332. struct drm_buf_pub {
  333. int idx; /**< Index into the master buffer list */
  334. int total; /**< Buffer size */
  335. int used; /**< Amount of buffer in use (for DMA) */
  336. void *address; /**< Address of buffer */
  337. };
  338. /*
  339. * DRM_IOCTL_MAP_BUFS ioctl argument type.
  340. */
  341. struct drm_buf_map {
  342. int count; /**< Length of the buffer list */
  343. #ifdef __cplusplus
  344. void *virt;
  345. #else
  346. void *virtual; /**< Mmap'd area in user-virtual */
  347. #endif
  348. struct drm_buf_pub *list; /**< Buffer information */
  349. };
  350. /*
  351. * DRM_IOCTL_DMA ioctl argument type.
  352. *
  353. * Indices here refer to the offset into the buffer list in drm_buf_get.
  354. *
  355. * \sa drmDMA().
  356. */
  357. struct drm_dma {
  358. int context; /**< Context handle */
  359. int send_count; /**< Number of buffers to send */
  360. int *send_indices; /**< List of handles to buffers */
  361. int *send_sizes; /**< Lengths of data to send */
  362. enum drm_dma_flags flags; /**< Flags */
  363. int request_count; /**< Number of buffers requested */
  364. int request_size; /**< Desired size for buffers */
  365. int *request_indices; /**< Buffer information */
  366. int *request_sizes;
  367. int granted_count; /**< Number of buffers granted */
  368. };
  369. enum drm_ctx_flags {
  370. _DRM_CONTEXT_PRESERVED = 0x01,
  371. _DRM_CONTEXT_2DONLY = 0x02
  372. };
  373. /*
  374. * DRM_IOCTL_ADD_CTX ioctl argument type.
  375. *
  376. * \sa drmCreateContext() and drmDestroyContext().
  377. */
  378. struct drm_ctx {
  379. drm_context_t handle;
  380. enum drm_ctx_flags flags;
  381. };
  382. /*
  383. * DRM_IOCTL_RES_CTX ioctl argument type.
  384. */
  385. struct drm_ctx_res {
  386. int count;
  387. struct drm_ctx *contexts;
  388. };
  389. /*
  390. * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
  391. */
  392. struct drm_draw {
  393. drm_drawable_t handle;
  394. };
  395. /*
  396. * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
  397. */
  398. typedef enum {
  399. DRM_DRAWABLE_CLIPRECTS
  400. } drm_drawable_info_type_t;
  401. struct drm_update_draw {
  402. drm_drawable_t handle;
  403. unsigned int type;
  404. unsigned int num;
  405. unsigned long long data;
  406. };
  407. /*
  408. * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
  409. */
  410. struct drm_auth {
  411. drm_magic_t magic;
  412. };
  413. /*
  414. * DRM_IOCTL_IRQ_BUSID ioctl argument type.
  415. *
  416. * \sa drmGetInterruptFromBusID().
  417. */
  418. struct drm_irq_busid {
  419. int irq; /**< IRQ number */
  420. int busnum; /**< bus number */
  421. int devnum; /**< device number */
  422. int funcnum; /**< function number */
  423. };
  424. enum drm_vblank_seq_type {
  425. _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
  426. _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
  427. /* bits 1-6 are reserved for high crtcs */
  428. _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
  429. _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */
  430. _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
  431. _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
  432. _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
  433. _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
  434. };
  435. #define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
  436. #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
  437. #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
  438. _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)
  439. struct drm_wait_vblank_request {
  440. enum drm_vblank_seq_type type;
  441. unsigned int sequence;
  442. unsigned long signal;
  443. };
  444. struct drm_wait_vblank_reply {
  445. enum drm_vblank_seq_type type;
  446. unsigned int sequence;
  447. long tval_sec;
  448. long tval_usec;
  449. };
  450. /*
  451. * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
  452. *
  453. * \sa drmWaitVBlank().
  454. */
  455. union drm_wait_vblank {
  456. struct drm_wait_vblank_request request;
  457. struct drm_wait_vblank_reply reply;
  458. };
  459. #define _DRM_PRE_MODESET 1
  460. #define _DRM_POST_MODESET 2
  461. /*
  462. * DRM_IOCTL_MODESET_CTL ioctl argument type
  463. *
  464. * \sa drmModesetCtl().
  465. */
  466. struct drm_modeset_ctl {
  467. __u32 crtc;
  468. __u32 cmd;
  469. };
  470. /*
  471. * DRM_IOCTL_AGP_ENABLE ioctl argument type.
  472. *
  473. * \sa drmAgpEnable().
  474. */
  475. struct drm_agp_mode {
  476. unsigned long mode; /**< AGP mode */
  477. };
  478. /*
  479. * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
  480. *
  481. * \sa drmAgpAlloc() and drmAgpFree().
  482. */
  483. struct drm_agp_buffer {
  484. unsigned long size; /**< In bytes -- will round to page boundary */
  485. unsigned long handle; /**< Used for binding / unbinding */
  486. unsigned long type; /**< Type of memory to allocate */
  487. unsigned long physical; /**< Physical used by i810 */
  488. };
  489. /*
  490. * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
  491. *
  492. * \sa drmAgpBind() and drmAgpUnbind().
  493. */
  494. struct drm_agp_binding {
  495. unsigned long handle; /**< From drm_agp_buffer */
  496. unsigned long offset; /**< In bytes -- will round to page boundary */
  497. };
  498. /*
  499. * DRM_IOCTL_AGP_INFO ioctl argument type.
  500. *
  501. * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
  502. * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
  503. * drmAgpVendorId() and drmAgpDeviceId().
  504. */
  505. struct drm_agp_info {
  506. int agp_version_major;
  507. int agp_version_minor;
  508. unsigned long mode;
  509. unsigned long aperture_base; /* physical address */
  510. unsigned long aperture_size; /* bytes */
  511. unsigned long memory_allowed; /* bytes */
  512. unsigned long memory_used;
  513. /* PCI information */
  514. unsigned short id_vendor;
  515. unsigned short id_device;
  516. };
  517. /*
  518. * DRM_IOCTL_SG_ALLOC ioctl argument type.
  519. */
  520. struct drm_scatter_gather {
  521. unsigned long size; /**< In bytes -- will round to page boundary */
  522. unsigned long handle; /**< Used for mapping / unmapping */
  523. };
  524. /*
  525. * DRM_IOCTL_SET_VERSION ioctl argument type.
  526. */
  527. struct drm_set_version {
  528. int drm_di_major;
  529. int drm_di_minor;
  530. int drm_dd_major;
  531. int drm_dd_minor;
  532. };
  533. /* DRM_IOCTL_GEM_CLOSE ioctl argument type */
  534. struct drm_gem_close {
  535. /** Handle of the object to be closed. */
  536. __u32 handle;
  537. __u32 pad;
  538. };
  539. /* DRM_IOCTL_GEM_FLINK ioctl argument type */
  540. struct drm_gem_flink {
  541. /** Handle for the object being named */
  542. __u32 handle;
  543. /** Returned global name */
  544. __u32 name;
  545. };
  546. /* DRM_IOCTL_GEM_OPEN ioctl argument type */
  547. struct drm_gem_open {
  548. /** Name of object being opened */
  549. __u32 name;
  550. /** Returned handle for the object */
  551. __u32 handle;
  552. /** Returned size of the object */
  553. __u64 size;
  554. };
  555. /**
  556. * DRM_CAP_DUMB_BUFFER
  557. *
  558. * If set to 1, the driver supports creating dumb buffers via the
  559. * &DRM_IOCTL_MODE_CREATE_DUMB ioctl.
  560. */
  561. #define DRM_CAP_DUMB_BUFFER 0x1
  562. /**
  563. * DRM_CAP_VBLANK_HIGH_CRTC
  564. *
  565. * If set to 1, the kernel supports specifying a :ref:`CRTC index<crtc_index>`
  566. * in the high bits of &drm_wait_vblank_request.type.
  567. *
  568. * Starting kernel version 2.6.39, this capability is always set to 1.
  569. */
  570. #define DRM_CAP_VBLANK_HIGH_CRTC 0x2
  571. /**
  572. * DRM_CAP_DUMB_PREFERRED_DEPTH
  573. *
  574. * The preferred bit depth for dumb buffers.
  575. *
  576. * The bit depth is the number of bits used to indicate the color of a single
  577. * pixel excluding any padding. This is different from the number of bits per
  578. * pixel. For instance, XRGB8888 has a bit depth of 24 but has 32 bits per
  579. * pixel.
  580. *
  581. * Note that this preference only applies to dumb buffers, it's irrelevant for
  582. * other types of buffers.
  583. */
  584. #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
  585. /**
  586. * DRM_CAP_DUMB_PREFER_SHADOW
  587. *
  588. * If set to 1, the driver prefers userspace to render to a shadow buffer
  589. * instead of directly rendering to a dumb buffer. For best speed, userspace
  590. * should do streaming ordered memory copies into the dumb buffer and never
  591. * read from it.
  592. *
  593. * Note that this preference only applies to dumb buffers, it's irrelevant for
  594. * other types of buffers.
  595. */
  596. #define DRM_CAP_DUMB_PREFER_SHADOW 0x4
  597. /**
  598. * DRM_CAP_PRIME
  599. *
  600. * Bitfield of supported PRIME sharing capabilities. See &DRM_PRIME_CAP_IMPORT
  601. * and &DRM_PRIME_CAP_EXPORT.
  602. *
  603. * Starting from kernel version 6.6, both &DRM_PRIME_CAP_IMPORT and
  604. * &DRM_PRIME_CAP_EXPORT are always advertised.
  605. *
  606. * PRIME buffers are exposed as dma-buf file descriptors.
  607. * See :ref:`prime_buffer_sharing`.
  608. */
  609. #define DRM_CAP_PRIME 0x5
  610. /**
  611. * DRM_PRIME_CAP_IMPORT
  612. *
  613. * If this bit is set in &DRM_CAP_PRIME, the driver supports importing PRIME
  614. * buffers via the &DRM_IOCTL_PRIME_FD_TO_HANDLE ioctl.
  615. *
  616. * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME.
  617. */
  618. #define DRM_PRIME_CAP_IMPORT 0x1
  619. /**
  620. * DRM_PRIME_CAP_EXPORT
  621. *
  622. * If this bit is set in &DRM_CAP_PRIME, the driver supports exporting PRIME
  623. * buffers via the &DRM_IOCTL_PRIME_HANDLE_TO_FD ioctl.
  624. *
  625. * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME.
  626. */
  627. #define DRM_PRIME_CAP_EXPORT 0x2
  628. /**
  629. * DRM_CAP_TIMESTAMP_MONOTONIC
  630. *
  631. * If set to 0, the kernel will report timestamps with ``CLOCK_REALTIME`` in
  632. * struct drm_event_vblank. If set to 1, the kernel will report timestamps with
  633. * ``CLOCK_MONOTONIC``. See ``clock_gettime(2)`` for the definition of these
  634. * clocks.
  635. *
  636. * Starting from kernel version 2.6.39, the default value for this capability
  637. * is 1. Starting kernel version 4.15, this capability is always set to 1.
  638. */
  639. #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
  640. /**
  641. * DRM_CAP_ASYNC_PAGE_FLIP
  642. *
  643. * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for legacy
  644. * page-flips.
  645. */
  646. #define DRM_CAP_ASYNC_PAGE_FLIP 0x7
  647. /**
  648. * DRM_CAP_CURSOR_WIDTH
  649. *
  650. * The ``CURSOR_WIDTH`` and ``CURSOR_HEIGHT`` capabilities return a valid
  651. * width x height combination for the hardware cursor. The intention is that a
  652. * hardware agnostic userspace can query a cursor plane size to use.
  653. *
  654. * Note that the cross-driver contract is to merely return a valid size;
  655. * drivers are free to attach another meaning on top, eg. i915 returns the
  656. * maximum plane size.
  657. */
  658. #define DRM_CAP_CURSOR_WIDTH 0x8
  659. /**
  660. * DRM_CAP_CURSOR_HEIGHT
  661. *
  662. * See &DRM_CAP_CURSOR_WIDTH.
  663. */
  664. #define DRM_CAP_CURSOR_HEIGHT 0x9
  665. /**
  666. * DRM_CAP_ADDFB2_MODIFIERS
  667. *
  668. * If set to 1, the driver supports supplying modifiers in the
  669. * &DRM_IOCTL_MODE_ADDFB2 ioctl.
  670. */
  671. #define DRM_CAP_ADDFB2_MODIFIERS 0x10
  672. /**
  673. * DRM_CAP_PAGE_FLIP_TARGET
  674. *
  675. * If set to 1, the driver supports the &DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE and
  676. * &DRM_MODE_PAGE_FLIP_TARGET_RELATIVE flags in
  677. * &drm_mode_crtc_page_flip_target.flags for the &DRM_IOCTL_MODE_PAGE_FLIP
  678. * ioctl.
  679. */
  680. #define DRM_CAP_PAGE_FLIP_TARGET 0x11
  681. /**
  682. * DRM_CAP_CRTC_IN_VBLANK_EVENT
  683. *
  684. * If set to 1, the kernel supports reporting the CRTC ID in
  685. * &drm_event_vblank.crtc_id for the &DRM_EVENT_VBLANK and
  686. * &DRM_EVENT_FLIP_COMPLETE events.
  687. *
  688. * Starting kernel version 4.12, this capability is always set to 1.
  689. */
  690. #define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12
  691. /**
  692. * DRM_CAP_SYNCOBJ
  693. *
  694. * If set to 1, the driver supports sync objects. See :ref:`drm_sync_objects`.
  695. */
  696. #define DRM_CAP_SYNCOBJ 0x13
  697. /**
  698. * DRM_CAP_SYNCOBJ_TIMELINE
  699. *
  700. * If set to 1, the driver supports timeline operations on sync objects. See
  701. * :ref:`drm_sync_objects`.
  702. */
  703. #define DRM_CAP_SYNCOBJ_TIMELINE 0x14
  704. /**
  705. * DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP
  706. *
  707. * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for atomic
  708. * commits.
  709. */
  710. #define DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP 0x15
  711. /* DRM_IOCTL_GET_CAP ioctl argument type */
  712. struct drm_get_cap {
  713. __u64 capability;
  714. __u64 value;
  715. };
  716. /**
  717. * DRM_CLIENT_CAP_STEREO_3D
  718. *
  719. * If set to 1, the DRM core will expose the stereo 3D capabilities of the
  720. * monitor by advertising the supported 3D layouts in the flags of struct
  721. * drm_mode_modeinfo. See ``DRM_MODE_FLAG_3D_*``.
  722. *
  723. * This capability is always supported for all drivers starting from kernel
  724. * version 3.13.
  725. */
  726. #define DRM_CLIENT_CAP_STEREO_3D 1
  727. /**
  728. * DRM_CLIENT_CAP_UNIVERSAL_PLANES
  729. *
  730. * If set to 1, the DRM core will expose all planes (overlay, primary, and
  731. * cursor) to userspace.
  732. *
  733. * This capability has been introduced in kernel version 3.15. Starting from
  734. * kernel version 3.17, this capability is always supported for all drivers.
  735. */
  736. #define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
  737. /**
  738. * DRM_CLIENT_CAP_ATOMIC
  739. *
  740. * If set to 1, the DRM core will expose atomic properties to userspace. This
  741. * implicitly enables &DRM_CLIENT_CAP_UNIVERSAL_PLANES and
  742. * &DRM_CLIENT_CAP_ASPECT_RATIO.
  743. *
  744. * If the driver doesn't support atomic mode-setting, enabling this capability
  745. * will fail with -EOPNOTSUPP.
  746. *
  747. * This capability has been introduced in kernel version 4.0. Starting from
  748. * kernel version 4.2, this capability is always supported for atomic-capable
  749. * drivers.
  750. */
  751. #define DRM_CLIENT_CAP_ATOMIC 3
  752. /**
  753. * DRM_CLIENT_CAP_ASPECT_RATIO
  754. *
  755. * If set to 1, the DRM core will provide aspect ratio information in modes.
  756. * See ``DRM_MODE_FLAG_PIC_AR_*``.
  757. *
  758. * This capability is always supported for all drivers starting from kernel
  759. * version 4.18.
  760. */
  761. #define DRM_CLIENT_CAP_ASPECT_RATIO 4
  762. /**
  763. * DRM_CLIENT_CAP_WRITEBACK_CONNECTORS
  764. *
  765. * If set to 1, the DRM core will expose special connectors to be used for
  766. * writing back to memory the scene setup in the commit. The client must enable
  767. * &DRM_CLIENT_CAP_ATOMIC first.
  768. *
  769. * This capability is always supported for atomic-capable drivers starting from
  770. * kernel version 4.19.
  771. */
  772. #define DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 5
  773. /**
  774. * DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT
  775. *
  776. * Drivers for para-virtualized hardware (e.g. vmwgfx, qxl, virtio and
  777. * virtualbox) have additional restrictions for cursor planes (thus
  778. * making cursor planes on those drivers not truly universal,) e.g.
  779. * they need cursor planes to act like one would expect from a mouse
  780. * cursor and have correctly set hotspot properties.
  781. * If this client cap is not set the DRM core will hide cursor plane on
  782. * those virtualized drivers because not setting it implies that the
  783. * client is not capable of dealing with those extra restictions.
  784. * Clients which do set cursor hotspot and treat the cursor plane
  785. * like a mouse cursor should set this property.
  786. * The client must enable &DRM_CLIENT_CAP_ATOMIC first.
  787. *
  788. * Setting this property on drivers which do not special case
  789. * cursor planes (i.e. non-virtualized drivers) will return
  790. * EOPNOTSUPP, which can be used by userspace to gauge
  791. * requirements of the hardware/drivers they're running on.
  792. *
  793. * This capability is always supported for atomic-capable virtualized
  794. * drivers starting from kernel version 6.6.
  795. */
  796. #define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6
  797. /* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
  798. struct drm_set_client_cap {
  799. __u64 capability;
  800. __u64 value;
  801. };
  802. #define DRM_RDWR O_RDWR
  803. #define DRM_CLOEXEC O_CLOEXEC
  804. struct drm_prime_handle {
  805. __u32 handle;
  806. /** Flags.. only applicable for handle->fd */
  807. __u32 flags;
  808. /** Returned dmabuf file descriptor */
  809. __s32 fd;
  810. };
  811. struct drm_syncobj_create {
  812. __u32 handle;
  813. #define DRM_SYNCOBJ_CREATE_SIGNALED (1 << 0)
  814. __u32 flags;
  815. };
  816. struct drm_syncobj_destroy {
  817. __u32 handle;
  818. __u32 pad;
  819. };
  820. #define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
  821. #define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
  822. struct drm_syncobj_handle {
  823. __u32 handle;
  824. __u32 flags;
  825. __s32 fd;
  826. __u32 pad;
  827. };
  828. struct drm_syncobj_transfer {
  829. __u32 src_handle;
  830. __u32 dst_handle;
  831. __u64 src_point;
  832. __u64 dst_point;
  833. __u32 flags;
  834. __u32 pad;
  835. };
  836. #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
  837. #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
  838. #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point to become available */
  839. #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE (1 << 3) /* set fence deadline to deadline_nsec */
  840. struct drm_syncobj_wait {
  841. __u64 handles;
  842. /* absolute timeout */
  843. __s64 timeout_nsec;
  844. __u32 count_handles;
  845. __u32 flags;
  846. __u32 first_signaled; /* only valid when not waiting all */
  847. __u32 pad;
  848. /**
  849. * @deadline_nsec - fence deadline hint
  850. *
  851. * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing
  852. * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is
  853. * set.
  854. */
  855. __u64 deadline_nsec;
  856. };
  857. struct drm_syncobj_timeline_wait {
  858. __u64 handles;
  859. /* wait on specific timeline point for every handles*/
  860. __u64 points;
  861. /* absolute timeout */
  862. __s64 timeout_nsec;
  863. __u32 count_handles;
  864. __u32 flags;
  865. __u32 first_signaled; /* only valid when not waiting all */
  866. __u32 pad;
  867. /**
  868. * @deadline_nsec - fence deadline hint
  869. *
  870. * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing
  871. * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is
  872. * set.
  873. */
  874. __u64 deadline_nsec;
  875. };
  876. /**
  877. * struct drm_syncobj_eventfd
  878. * @handle: syncobj handle.
  879. * @flags: Zero to wait for the point to be signalled, or
  880. * &DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE to wait for a fence to be
  881. * available for the point.
  882. * @point: syncobj timeline point (set to zero for binary syncobjs).
  883. * @fd: Existing eventfd to sent events to.
  884. * @pad: Must be zero.
  885. *
  886. * Register an eventfd to be signalled by a syncobj. The eventfd counter will
  887. * be incremented by one.
  888. */
  889. struct drm_syncobj_eventfd {
  890. __u32 handle;
  891. __u32 flags;
  892. __u64 point;
  893. __s32 fd;
  894. __u32 pad;
  895. };
  896. struct drm_syncobj_array {
  897. __u64 handles;
  898. __u32 count_handles;
  899. __u32 pad;
  900. };
  901. #define DRM_SYNCOBJ_QUERY_FLAGS_LAST_SUBMITTED (1 << 0) /* last available point on timeline syncobj */
  902. struct drm_syncobj_timeline_array {
  903. __u64 handles;
  904. __u64 points;
  905. __u32 count_handles;
  906. __u32 flags;
  907. };
  908. /* Query current scanout sequence number */
  909. struct drm_crtc_get_sequence {
  910. __u32 crtc_id; /* requested crtc_id */
  911. __u32 active; /* return: crtc output is active */
  912. __u64 sequence; /* return: most recent vblank sequence */
  913. __s64 sequence_ns; /* return: most recent time of first pixel out */
  914. };
  915. /* Queue event to be delivered at specified sequence. Time stamp marks
  916. * when the first pixel of the refresh cycle leaves the display engine
  917. * for the display
  918. */
  919. #define DRM_CRTC_SEQUENCE_RELATIVE 0x00000001 /* sequence is relative to current */
  920. #define DRM_CRTC_SEQUENCE_NEXT_ON_MISS 0x00000002 /* Use next sequence if we've missed */
  921. struct drm_crtc_queue_sequence {
  922. __u32 crtc_id;
  923. __u32 flags;
  924. __u64 sequence; /* on input, target sequence. on output, actual sequence */
  925. __u64 user_data; /* user data passed to event */
  926. };
  927. #if defined(__cplusplus)
  928. }
  929. #endif
  930. #include "drm_mode.h"
  931. #if defined(__cplusplus)
  932. extern "C" {
  933. #endif
  934. #define DRM_IOCTL_BASE 'd'
  935. #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
  936. #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
  937. #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
  938. #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
  939. #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
  940. #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
  941. #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
  942. #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
  943. #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
  944. #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
  945. #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
  946. #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
  947. #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
  948. /**
  949. * DRM_IOCTL_GEM_CLOSE - Close a GEM handle.
  950. *
  951. * GEM handles are not reference-counted by the kernel. User-space is
  952. * responsible for managing their lifetime. For example, if user-space imports
  953. * the same memory object twice on the same DRM file description, the same GEM
  954. * handle is returned by both imports, and user-space needs to ensure
  955. * &DRM_IOCTL_GEM_CLOSE is performed once only. The same situation can happen
  956. * when a memory object is allocated, then exported and imported again on the
  957. * same DRM file description. The &DRM_IOCTL_MODE_GETFB2 IOCTL is an exception
  958. * and always returns fresh new GEM handles even if an existing GEM handle
  959. * already refers to the same memory object before the IOCTL is performed.
  960. */
  961. #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
  962. #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
  963. #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
  964. #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap)
  965. #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap)
  966. #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
  967. #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
  968. #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
  969. #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
  970. #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
  971. #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
  972. #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
  973. #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
  974. #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
  975. #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
  976. #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
  977. #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
  978. #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
  979. #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
  980. #define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)
  981. #define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)
  982. #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
  983. #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
  984. #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
  985. #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
  986. #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
  987. #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
  988. #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
  989. #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
  990. #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
  991. #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
  992. #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
  993. #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
  994. #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
  995. /**
  996. * DRM_IOCTL_PRIME_HANDLE_TO_FD - Convert a GEM handle to a DMA-BUF FD.
  997. *
  998. * User-space sets &drm_prime_handle.handle with the GEM handle to export and
  999. * &drm_prime_handle.flags, and gets back a DMA-BUF file descriptor in
  1000. * &drm_prime_handle.fd.
  1001. *
  1002. * The export can fail for any driver-specific reason, e.g. because export is
  1003. * not supported for this specific GEM handle (but might be for others).
  1004. *
  1005. * Support for exporting DMA-BUFs is advertised via &DRM_PRIME_CAP_EXPORT.
  1006. */
  1007. #define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle)
  1008. /**
  1009. * DRM_IOCTL_PRIME_FD_TO_HANDLE - Convert a DMA-BUF FD to a GEM handle.
  1010. *
  1011. * User-space sets &drm_prime_handle.fd with a DMA-BUF file descriptor to
  1012. * import, and gets back a GEM handle in &drm_prime_handle.handle.
  1013. * &drm_prime_handle.flags is unused.
  1014. *
  1015. * If an existing GEM handle refers to the memory object backing the DMA-BUF,
  1016. * that GEM handle is returned. Therefore user-space which needs to handle
  1017. * arbitrary DMA-BUFs must have a user-space lookup data structure to manually
  1018. * reference-count duplicated GEM handles. For more information see
  1019. * &DRM_IOCTL_GEM_CLOSE.
  1020. *
  1021. * The import can fail for any driver-specific reason, e.g. because import is
  1022. * only supported for DMA-BUFs allocated on this DRM device.
  1023. *
  1024. * Support for importing DMA-BUFs is advertised via &DRM_PRIME_CAP_IMPORT.
  1025. */
  1026. #define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle)
  1027. #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
  1028. #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
  1029. #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
  1030. #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
  1031. #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
  1032. #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
  1033. #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
  1034. #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
  1035. #define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
  1036. #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
  1037. #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
  1038. #define DRM_IOCTL_CRTC_GET_SEQUENCE DRM_IOWR(0x3b, struct drm_crtc_get_sequence)
  1039. #define DRM_IOCTL_CRTC_QUEUE_SEQUENCE DRM_IOWR(0x3c, struct drm_crtc_queue_sequence)
  1040. #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
  1041. #define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
  1042. #define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc)
  1043. #define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc)
  1044. #define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor)
  1045. #define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
  1046. #define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
  1047. #define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
  1048. #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
  1049. #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */
  1050. #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */
  1051. #define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
  1052. #define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
  1053. #define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob)
  1054. #define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
  1055. #define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
  1056. /**
  1057. * DRM_IOCTL_MODE_RMFB - Remove a framebuffer.
  1058. *
  1059. * This removes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL
  1060. * argument is a framebuffer object ID.
  1061. *
  1062. * Warning: removing a framebuffer currently in-use on an enabled plane will
  1063. * disable that plane. The CRTC the plane is linked to may also be disabled
  1064. * (depending on driver capabilities).
  1065. */
  1066. #define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int)
  1067. #define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
  1068. #define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
  1069. /**
  1070. * DRM_IOCTL_MODE_CREATE_DUMB - Create a new dumb buffer object.
  1071. *
  1072. * KMS dumb buffers provide a very primitive way to allocate a buffer object
  1073. * suitable for scanout and map it for software rendering. KMS dumb buffers are
  1074. * not suitable for hardware-accelerated rendering nor video decoding. KMS dumb
  1075. * buffers are not suitable to be displayed on any other device than the KMS
  1076. * device where they were allocated from. Also see
  1077. * :ref:`kms_dumb_buffer_objects`.
  1078. *
  1079. * The IOCTL argument is a struct drm_mode_create_dumb.
  1080. *
  1081. * User-space is expected to create a KMS dumb buffer via this IOCTL, then add
  1082. * it as a KMS framebuffer via &DRM_IOCTL_MODE_ADDFB and map it via
  1083. * &DRM_IOCTL_MODE_MAP_DUMB.
  1084. *
  1085. * &DRM_CAP_DUMB_BUFFER indicates whether this IOCTL is supported.
  1086. * &DRM_CAP_DUMB_PREFERRED_DEPTH and &DRM_CAP_DUMB_PREFER_SHADOW indicate
  1087. * driver preferences for dumb buffers.
  1088. */
  1089. #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
  1090. #define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
  1091. #define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
  1092. #define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)
  1093. #define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane)
  1094. #define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane)
  1095. #define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2)
  1096. #define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties)
  1097. #define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property)
  1098. #define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2)
  1099. #define DRM_IOCTL_MODE_ATOMIC DRM_IOWR(0xBC, struct drm_mode_atomic)
  1100. #define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob)
  1101. #define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob)
  1102. #define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create)
  1103. #define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy)
  1104. #define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle)
  1105. #define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle)
  1106. #define DRM_IOCTL_SYNCOBJ_WAIT DRM_IOWR(0xC3, struct drm_syncobj_wait)
  1107. #define DRM_IOCTL_SYNCOBJ_RESET DRM_IOWR(0xC4, struct drm_syncobj_array)
  1108. #define DRM_IOCTL_SYNCOBJ_SIGNAL DRM_IOWR(0xC5, struct drm_syncobj_array)
  1109. #define DRM_IOCTL_MODE_CREATE_LEASE DRM_IOWR(0xC6, struct drm_mode_create_lease)
  1110. #define DRM_IOCTL_MODE_LIST_LESSEES DRM_IOWR(0xC7, struct drm_mode_list_lessees)
  1111. #define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct drm_mode_get_lease)
  1112. #define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease)
  1113. #define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait)
  1114. #define DRM_IOCTL_SYNCOBJ_QUERY DRM_IOWR(0xCB, struct drm_syncobj_timeline_array)
  1115. #define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer)
  1116. #define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct drm_syncobj_timeline_array)
  1117. /**
  1118. * DRM_IOCTL_MODE_GETFB2 - Get framebuffer metadata.
  1119. *
  1120. * This queries metadata about a framebuffer. User-space fills
  1121. * &drm_mode_fb_cmd2.fb_id as the input, and the kernels fills the rest of the
  1122. * struct as the output.
  1123. *
  1124. * If the client is DRM master or has &CAP_SYS_ADMIN, &drm_mode_fb_cmd2.handles
  1125. * will be filled with GEM buffer handles. Fresh new GEM handles are always
  1126. * returned, even if another GEM handle referring to the same memory object
  1127. * already exists on the DRM file description. The caller is responsible for
  1128. * removing the new handles, e.g. via the &DRM_IOCTL_GEM_CLOSE IOCTL. The same
  1129. * new handle will be returned for multiple planes in case they use the same
  1130. * memory object. Planes are valid until one has a zero handle -- this can be
  1131. * used to compute the number of planes.
  1132. *
  1133. * Otherwise, &drm_mode_fb_cmd2.handles will be zeroed and planes are valid
  1134. * until one has a zero &drm_mode_fb_cmd2.pitches.
  1135. *
  1136. * If the framebuffer has a format modifier, &DRM_MODE_FB_MODIFIERS will be set
  1137. * in &drm_mode_fb_cmd2.flags and &drm_mode_fb_cmd2.modifier will contain the
  1138. * modifier. Otherwise, user-space must ignore &drm_mode_fb_cmd2.modifier.
  1139. *
  1140. * To obtain DMA-BUF FDs for each plane without leaking GEM handles, user-space
  1141. * can export each handle via &DRM_IOCTL_PRIME_HANDLE_TO_FD, then immediately
  1142. * close each unique handle via &DRM_IOCTL_GEM_CLOSE, making sure to not
  1143. * double-close handles which are specified multiple times in the array.
  1144. */
  1145. #define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2)
  1146. #define DRM_IOCTL_SYNCOBJ_EVENTFD DRM_IOWR(0xCF, struct drm_syncobj_eventfd)
  1147. /**
  1148. * DRM_IOCTL_MODE_CLOSEFB - Close a framebuffer.
  1149. *
  1150. * This closes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL
  1151. * argument is a framebuffer object ID.
  1152. *
  1153. * This IOCTL is similar to &DRM_IOCTL_MODE_RMFB, except it doesn't disable
  1154. * planes and CRTCs. As long as the framebuffer is used by a plane, it's kept
  1155. * alive. When the plane no longer uses the framebuffer (because the
  1156. * framebuffer is replaced with another one, or the plane is disabled), the
  1157. * framebuffer is cleaned up.
  1158. *
  1159. * This is useful to implement flicker-free transitions between two processes.
  1160. *
  1161. * Depending on the threat model, user-space may want to ensure that the
  1162. * framebuffer doesn't expose any sensitive user information: closed
  1163. * framebuffers attached to a plane can be read back by the next DRM master.
  1164. */
  1165. #define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xD0, struct drm_mode_closefb)
  1166. /*
  1167. * Device specific ioctls should only be in their respective headers
  1168. * The device specific ioctl range is from 0x40 to 0x9f.
  1169. * Generic IOCTLS restart at 0xA0.
  1170. *
  1171. * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
  1172. * drmCommandReadWrite().
  1173. */
  1174. #define DRM_COMMAND_BASE 0x40
  1175. #define DRM_COMMAND_END 0xA0
  1176. /**
  1177. * struct drm_event - Header for DRM events
  1178. * @type: event type.
  1179. * @length: total number of payload bytes (including header).
  1180. *
  1181. * This struct is a header for events written back to user-space on the DRM FD.
  1182. * A read on the DRM FD will always only return complete events: e.g. if the
  1183. * read buffer is 100 bytes large and there are two 64 byte events pending,
  1184. * only one will be returned.
  1185. *
  1186. * Event types 0 - 0x7fffffff are generic DRM events, 0x80000000 and
  1187. * up are chipset specific. Generic DRM events include &DRM_EVENT_VBLANK,
  1188. * &DRM_EVENT_FLIP_COMPLETE and &DRM_EVENT_CRTC_SEQUENCE.
  1189. */
  1190. struct drm_event {
  1191. __u32 type;
  1192. __u32 length;
  1193. };
  1194. /**
  1195. * DRM_EVENT_VBLANK - vertical blanking event
  1196. *
  1197. * This event is sent in response to &DRM_IOCTL_WAIT_VBLANK with the
  1198. * &_DRM_VBLANK_EVENT flag set.
  1199. *
  1200. * The event payload is a struct drm_event_vblank.
  1201. */
  1202. #define DRM_EVENT_VBLANK 0x01
  1203. /**
  1204. * DRM_EVENT_FLIP_COMPLETE - page-flip completion event
  1205. *
  1206. * This event is sent in response to an atomic commit or legacy page-flip with
  1207. * the &DRM_MODE_PAGE_FLIP_EVENT flag set.
  1208. *
  1209. * The event payload is a struct drm_event_vblank.
  1210. */
  1211. #define DRM_EVENT_FLIP_COMPLETE 0x02
  1212. /**
  1213. * DRM_EVENT_CRTC_SEQUENCE - CRTC sequence event
  1214. *
  1215. * This event is sent in response to &DRM_IOCTL_CRTC_QUEUE_SEQUENCE.
  1216. *
  1217. * The event payload is a struct drm_event_crtc_sequence.
  1218. */
  1219. #define DRM_EVENT_CRTC_SEQUENCE 0x03
  1220. struct drm_event_vblank {
  1221. struct drm_event base;
  1222. __u64 user_data;
  1223. __u32 tv_sec;
  1224. __u32 tv_usec;
  1225. __u32 sequence;
  1226. __u32 crtc_id; /* 0 on older kernels that do not support this */
  1227. };
  1228. /* Event delivered at sequence. Time stamp marks when the first pixel
  1229. * of the refresh cycle leaves the display engine for the display
  1230. */
  1231. struct drm_event_crtc_sequence {
  1232. struct drm_event base;
  1233. __u64 user_data;
  1234. __s64 time_ns;
  1235. __u64 sequence;
  1236. };
  1237. /* typedef area */
  1238. typedef struct drm_clip_rect drm_clip_rect_t;
  1239. typedef struct drm_drawable_info drm_drawable_info_t;
  1240. typedef struct drm_tex_region drm_tex_region_t;
  1241. typedef struct drm_hw_lock drm_hw_lock_t;
  1242. typedef struct drm_version drm_version_t;
  1243. typedef struct drm_unique drm_unique_t;
  1244. typedef struct drm_list drm_list_t;
  1245. typedef struct drm_block drm_block_t;
  1246. typedef struct drm_control drm_control_t;
  1247. typedef enum drm_map_type drm_map_type_t;
  1248. typedef enum drm_map_flags drm_map_flags_t;
  1249. typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
  1250. typedef struct drm_map drm_map_t;
  1251. typedef struct drm_client drm_client_t;
  1252. typedef enum drm_stat_type drm_stat_type_t;
  1253. typedef struct drm_stats drm_stats_t;
  1254. typedef enum drm_lock_flags drm_lock_flags_t;
  1255. typedef struct drm_lock drm_lock_t;
  1256. typedef enum drm_dma_flags drm_dma_flags_t;
  1257. typedef struct drm_buf_desc drm_buf_desc_t;
  1258. typedef struct drm_buf_info drm_buf_info_t;
  1259. typedef struct drm_buf_free drm_buf_free_t;
  1260. typedef struct drm_buf_pub drm_buf_pub_t;
  1261. typedef struct drm_buf_map drm_buf_map_t;
  1262. typedef struct drm_dma drm_dma_t;
  1263. typedef union drm_wait_vblank drm_wait_vblank_t;
  1264. typedef struct drm_agp_mode drm_agp_mode_t;
  1265. typedef enum drm_ctx_flags drm_ctx_flags_t;
  1266. typedef struct drm_ctx drm_ctx_t;
  1267. typedef struct drm_ctx_res drm_ctx_res_t;
  1268. typedef struct drm_draw drm_draw_t;
  1269. typedef struct drm_update_draw drm_update_draw_t;
  1270. typedef struct drm_auth drm_auth_t;
  1271. typedef struct drm_irq_busid drm_irq_busid_t;
  1272. typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
  1273. typedef struct drm_agp_buffer drm_agp_buffer_t;
  1274. typedef struct drm_agp_binding drm_agp_binding_t;
  1275. typedef struct drm_agp_info drm_agp_info_t;
  1276. typedef struct drm_scatter_gather drm_scatter_gather_t;
  1277. typedef struct drm_set_version drm_set_version_t;
  1278. #if defined(__cplusplus)
  1279. }
  1280. #endif
  1281. #endif